Abstract
Integrating analog, mixed signal and RF circuits with digital in a System-on-Chip (SoC) design solution is a major trend nowadays and finds many applications in areas like wireless and wireline communications and multimedia applications.
This chapter presents statistical design techniques leading to optimization and yield enhancement of integrated CMOS analog and mixed signal solutions. In a SoC design, minimizing yield loss that often results from incorporating analog or RF parts in a large SoC digital design is becoming increasingly important to maintain a cost effective total solution. This is particularly true in today’s deep sub-micron technologies where random process variations, supply noise and ground bounce become increasingly critical. Robust design techniques at both the schematic and physical layout levels will be discussed and demonstrated with design examples of low voltage CMOS analog integrated circuits.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
11. References
Meindl, J.D., “Low Power Microelectronics: Retrospect Prospect”, Proceedings of the IEEE, vol.83,No.4, April 1995
Huijsing, J.H. and Linbarger, D., “Low Voltage Operational Ampli fier With Rail-to-Rail input and output ranges”, IEEE Journal of Solid-State Circuits, vol.SC-20, pp.1144–1150. December 1985
Hogervorst, R., Wiegerink, R.J., de Jong, P.A.L., Fonderi, L., Wassenaar, R.F., and Huijsing, J.H., “CMOS Low Voltage Operational Amplifier with Constant gm Rail-to-Rail Input Stage”, Proceedings of the IEEE International Symposium on Circuits and Systems, pp. 2876–2879,1992
Hwang, C., Motamed, A., and Ismail, M., “Universal Constant-g m Input Stage Architecture for Low Voltage Opamps”, IEEE Transactions on Circuits and Systems, vol.42, pp.2876–2879,1992
Abel, C., Michael, C., Ismail, M., Teng, C.S., and Lahri, R., “Reliability Characterization of Mixed-Signal Chips”, IEEE Circuits and Devices Magazine, pp.8–10, July 1997
Motamed, A., “Low-voltage Analog VLSI Circuits and Signal Processing”, Ph.D. Dissertation in Electrical Engineering, The Ohic State University, 1996
Hwang, C., Hyogo, A., Ismail, M. and Kim, H., “LV CMOS Analog VLSI Composite Cell Design and Its Application to High Speed Multiplier”, IEEJ 1st Int’l Analog VLSI Workshop, ECT-97-48, pp95–98, The Ohio State University, USA, May 1997
Seevinck, E. and Wassenaar, R. F., “A Versatile CMOS Lineai Transconductor / Square-law Function Circuit”, IEEE Journal oi Solid State Circuits, SC-22, pp366–377, June 1987
Hyogo, A., Hwang, C., Ismail, M. and Sekine, K., “LV/LP CMOS Square-Law Composite Transistors for Analog VLSI Applications” IEEJ 1st International Analog VLSI Workshop, ECT-97-59, pp139–143, The Ohio State University, USA, May 1997
Motamed, A., Hwang, C., and Ismail, M., “CMOS Exponentia Current-to-Voltage Converter”, Electronics Letters, Vol.33,No. 12., pp998–1000, June 5th, 1997
Tarim, T.B. and Ismail, M., “Statistical Design and Yield Enhancement of CMOS Analog VLSI Circuits”, IEEE Circuits and Device’ Magazine, pp.12–22, March 1999
C. Michael and M. Ismail, Statistical Modeling for Computer-Aided Design of MOS VLSI Circuits, Kluwer Academic Publishers, Boston. 1993
Pelgrom, M.J.M., Duinmaiger, A.C.J., and Welbers, A.P.G.. “Matching Properties of MOS Transistors”, IEEE Journal of Solid-State Circuits, vol. SC-24, pp.1433–1439, October 1989
Shyn, J.-B., Temes, G.C., and Krummenacher, F., “Random Erroi Effects in Matched MOS Capacitors and Current Sources”, IEEE Journal of Solid State Circuits, vol.SC-19, pp.948–955, December 1984
Lakshmikumar, K.R., Hadaway, R.A., and Copeland, M.A., “Characterization and Modeling of Mismatch in MOS Transistors for Precision Analog Design”, IEEE Journal of Solid State Circuits, vol.SC-21, pp.1057–1066, December 1986
G.E.P. Box, Empirical Model Building and Response Surfaces, John Wiley & Son, 1987
D.C. Montgomery, Design and Analysis of Experiments, New York: Wiley, 1997
Minitab, Statistical Software, Release 12, User’s Manual, 1997, http://www.minitab.com
Tarim, T.B., Statistical Design and Yield Enhancement of Low Voltage CMOS Analog VLSI Circuits, Ph.D. dissertation, Electronics and Communications Engineering Department, Istanbul Technical University, Istanbul, Turkey, 1999 au[21]_Constant Transconductance Design Methodology and Implementations thereof Inventors: A. Motamed, C. Hwang, and M. Ismail, Filed: August 14,1995, Issued: Feb. 3,1998, U.S., Patent No. 5,714,906
Hwang, C., Motamed, A., and Ismail, M., “Theory and Design of Universal Low Voltage OpAmps”, Chapter 1.1.3 in Emerging Technologies: Designing Low Power Digital Systems, R. Cavin and W. Lin (Editors), ISCAS 1996 Thtorial Book, May 1996, IEEE Catalog No. 96TH8189
Sakurai, S. and Ismail, M., “Robust Design of Rail-to-Rail CMOS Operational Amplifiers for a Low Power Supply Voltage”, IEEE Journal of Solid State Circuits, vol.31,no.2, pp.146–156, February 1996
Hogervorst, R., Tero, J.P., Eschauzier, G.H. and Huijsing, J.H., “A Compact Power Efficient 3V CMOS Rail-to-Rail Input/Output Operational Amplifier for VLSI Cell Libraries”, IEEE Journal of Solid State Circuits, pp.1505–1513, December 1994
Lin, C.-H., Chi, H., Hwang, C., and Ismail, M., “A Robust Low Voltage CMOS Rail-to-Rail OpAmp Architecture”, Proceedings of the 1st Analog VLSI Workshop, the IEEE of Japan, pp.17–22, Columbus, OH, May 1997
Clii, H., “Statistical Design and Optimization of Low Voltage Railto-Rail CMOS OpAmps” M.S. Thesis, The Ohio State University, May, 1997
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2004 Kluwer Academic Publishers
About this chapter
Cite this chapter
Tarim, T.B., Lin, CH., Ismail, M. (2004). Robust Low Voltage Low Power Analog Mos VLSI Design. In: Reis, R., Jess, J.A.G. (eds) Design of System on a Chip. Springer, Boston, MA. https://doi.org/10.1007/1-4020-7929-X_6
Download citation
DOI: https://doi.org/10.1007/1-4020-7929-X_6
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4020-7928-3
Online ISBN: 978-1-4020-7929-0
eBook Packages: Springer Book Archive