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Retargetable Application-driven Analog-digital Block Design

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Design of System on a Chip
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Abstract

In a world subject to a fast pace of technology evolution towards system level integration, drastic increase of design productivity is needed to reduce product development cycles and improve timely availability to the market. This can be achieved through the type of retargetable analog-digital blocks discussed in this chapter, whereby various functional building blocks, such as data conversion, amplification, and filtering, among other functions, are efficiently combined to allow easy re-usability for different technology environments and application requirements. The four main ingredients of such a methodology include optimized system-level partitioning for efficient handling of interfunction design constraints, technology adaptation capability ensured by component design methodologies which reduce technology dependency, effective use of silicon area ensured by maximum layout regularity, optimized component aspect ratios and careful floor planning and, finally, reduced routing density and routing area ensured by detailed analysis of route path characteristics and use of simplifying routing techniques. Examples of practical industry designs are given where such methodology has been efficiently employed to achieve significant improvements in product development cycles.

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8. References

  • F. Op’t Eynde, et al.,Analog Interfaces for Digital Signal Processing Systems, Boston: MA: Kluwer Academic, 1993.

    Google Scholar 

  • G. Beenker, et al., “Analog CAD for consumer IC’s”, in Analog Circuit Design, Huijsing, van der Plassche, and Sansen Eds., Boston, MA: Kluwer Academic, 1993, ch. 15.

    Google Scholar 

  • M. Degrauwe, et al., “IDAC: An interactive design tool for analog CMOS circuits”, IEEE J. Solid-State Circuits, vol. SC-22, pp. 1106–1116, Dec. 1987.

    Google Scholar 

  • P. Allen, et al., “A silicon compiler for successive approximation A/D and D/A converters”, in Proc. Custom Integrated Circuits Conf. (CICC), 1986, pp. 552–555.

    Google Scholar 

  • G. Jusuf, et al., “A performance driven analog-to-digital converter module generator”, in Proc. Int. Symp. Circuits Syst. (ISCAS), 1992, pp. 2160–2163.

    Google Scholar 

  • N. Horta, et al., “Framework for architecture synthesis of data conversion systems employing binary-weighted capacitor arrays”, in Proc. Int. Symp. Circuits Syst. (ISCAS), 1991, pp. 1789–1792.

    Google Scholar 

  • N. Horta, et al., “Automatic multi-level macromodel generation for data conversion systems employing binary-weighted capacitor arrays”, in Proc. Int. Symp. Circuits Syst. (ISCAS), 1992, pp. 2561–2564.

    Google Scholar 

  • G. Ruan, et al., “Modeling and simulation of ΔΣ A/D converters using a mixed-mode simulator”, in Proc. Custom Integrated Circuits Conf. (CICC), 1992, pp. 12.6.1–12.6.4.

    Google Scholar 

  • F. Medeiro, et al., “A vertically-integrated tool for automated design of ΔΣ modulators”, in Proc. Euro. Solid-State-Circuits Conf. (ESSCIRC), 1994, pp. 164–167.

    Google Scholar 

  • J. Vital, et al., “Synthesis of high-speed A/D converter architectures with flexible functional simulation capabilities”, in Proc. Int. Symp. Circuits Syst. (ISCAS), 1992, pp. 2156–2159.

    Google Scholar 

  • G. Casinovi, et al., “A macromodeling algorithm for analog circuits”, IEEE Trans. Computer-Aided Design, vol. 10, pp. 150–160, Feb. 1991.

    Article  Google Scholar 

  • L. Williams, et al., “MIDAS–A functional simulator for mixed-signal digital and analog sampled-data systems”, in Proc. Int. Symp. Circuits Syst. (ISCAS), 1992, pp. 2148–2151.

    Google Scholar 

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© 2004 Kluwer Academic Publishers

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Franca, J.E. (2004). Retargetable Application-driven Analog-digital Block Design. In: Reis, R., Jess, J.A.G. (eds) Design of System on a Chip. Springer, Boston, MA. https://doi.org/10.1007/1-4020-7929-X_5

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  • DOI: https://doi.org/10.1007/1-4020-7929-X_5

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4020-7928-3

  • Online ISBN: 978-1-4020-7929-0

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