Abstract
The first section of this chapter reviews the architecture of I/Q modulator and demodulator. To reduce the total die area, we will discuss how the IF VGA, modulator and demodulator circuits are re-used in the second section. The final section describes the proposed DC offset cancellation loop in demodulator.
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© 2006 Springer
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Chen, SJ., Hsieh, YH. (2006). I/Q MODULATOR AND DEMODULATOR DESIGN. In: IQ CALIBRATION TECHNIQUES FOR CMOS RADIO TRANSCEIVERS. Analog Circuits and Signal Processing. Springer, Dordrecht. https://doi.org/10.1007/1-4020-5083-6_3
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DOI: https://doi.org/10.1007/1-4020-5083-6_3
Publisher Name: Springer, Dordrecht
Print ISBN: 978-1-4020-5082-4
Online ISBN: 978-1-4020-5083-1
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