Abstract
The ability to (re)schedule a task either in hardware or software will be an important asset in a reconfigurable systems-on-chip. To support this feature we have developed an infrastructure that, combined with a suitable design environment permits the implementation and management of hardware/software relocatable tasks. This paper presents the general scope of our research, and details the communication scheme, the design environment and the hardware/software context switching issues. The infrastructure proved its feasibility by allowing us to design a relocatable video decoder. When implemented on an embedded platform, the decoder performs at 23 frames/s (320 × 240 pixels, 16 bits per pixel) in reconfigurable hardware and 6 frames/s in software.
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Mignolet, JY., Nollet, V., Coene, P., Verkest, D., Vernalde, S., Lauwereins, R. (2005). Enabling Run-time Task Relocation on Reconfigurable Systems. In: Lysaght, P., Rosenstiel, W. (eds) New Algorithms, Architectures and Applications for Reconfigurable Computing. Springer, Boston, MA. https://doi.org/10.1007/1-4020-3128-9_6
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DOI: https://doi.org/10.1007/1-4020-3128-9_6
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