Abstract
Fabrication technologies of SiGe-OI substrate, using SIMOX, bonding and growth of SiGe on top of Si-OI, are described. Attention was paid to the mechanism how SiGe-OI develops, and how the Ge concentration ceiling can be lifted. It is also indicated the achieved level of lattice relaxation and dislocation density of the SiGe layer in SiGe-OI. Remaining issues, which would be solved in order to develop devices based on SiGe-OI, are pointed out.
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References
J. P. Colinge, Silicon-On-Insulator Technology: Materials to VLSI (Kluwer, Boston, 1997).
K. Ismail, M. Arafa, K. L. Saenger, J. O.Chu, and B. S. Meyerson, Extremely high electron mobility in Si/SiGe modulation-doped heterostructures, Appl. Phys. Lett. 66(9), 1077–1079 (1995).
T. Tezuka, N. Sugiyama, T. Mizuno, M. Suzuki and S. Takagi, A Novel Fabrication Technique of Ultrathin and Relaxed SiGe Buffer Layers with High Ge Fraction for Sub-100nm Strained Silicon-on-Insulator MOSFETs, Jpn. J. Appl. Phys. 40(4B), 2866–2874 (2001).
S. Fukatsu, Y, Ishikawa, T. Saito, N. Shibata, SiGe-based semiconductor-on-insulator substrate created by low-energy separation-by-implanted-oxygen, Appl. Phys. Lett., 72(26), 3485–3487 (1998).
Y. Ishikawa, N. Shibata, S. Fukatsu, SiGe-on-insulator substrate using SiGe alloy grown Si(001), Appl. Phys. Lett., 75(7), 983–985 (1999).
Z. An, Y. Wu, M. Zhang, Z. Di, C. Lin, R. K. Y. Fu, P. Chen, P. K. Chu, W. Y. Cheung and S. P. Wong, Relaxed silicon-germanium-on-insulator substrate by oxygen implantation into pseudomorphic silicon germanium/silicon heterostructures, Appl. Phys. Lett., 82(15), 2452–2454 (2003).
L. J. Huang, J. O. Chu, D. F. Canaperi, C. P. D'Emic, R. M. Anderson, S. J. Koester, and H. S. P. Wong, SiGe-on-insulator prepared by wafer bonding and layer transfer for high-performance field-effect transistors, Appl. Phys. Lett., 78(9), 1267–1269 (2001).
G. Taraschi, T. A. Langdo, M. T. Currie, E. A. Fitzgerald and D. A. Antoniadis, Relaxed SiGe-on-insulator fabricated via wafer bonding and etch back, J. Vac. Sci. Technol., B20(2), 725–727 (2002).
G. Taraschi, Z. Y. Cheng, M. T. Currie, C. W. Leitz, T. A. Langdo, M. L. Lee, A. Pitera, E. A. Fitzgerald, Relaxed SiGe on Insulator Fabricated via Wafer Bonding and Layer Transfer: Etch-Back and Smart-Cut Alternatives, Electrochemical Society Proceedings Vol.2001-3, 27–32 (2001).
A. R. Powell, S. S. Iyer and F. K. Legoues, New approach to the growth of low dislocation relaxed SiGe material, Appl. Phys. Lett. 64(14), 1856–1858 (1994).
T. Tezuka, N. Sugiyama, and S. Takagi, Fabrication of strained Si on an ultarathin SiGe-on-insulator virtual sustrate with a high-Ge fraction, Appl. Phys. Lett., 79(12), 1798–1800 (2001).
N. Sugii, S. Yamaguchi and K. Washio, SiGe-on-insulator substrate fabricated by melt solidification for a strained-silicon complementary metal-oxide-semiconductor, J. Vac. Sci. Technol. B20(5), 1891–1896 (2002).
K. Kutsukale, N. Usami, K. Fujiwara, T. Ujihara, G. Sazaki, B. Zhang, Y. Segawa, and K. Nakajima, Fabrication of SiGe-on-Insulator through Thermal Diffusion of Ge on Si-on-Insulator Substrate, Jpn. J. Appl. Phys., 42(3A), L232–L234 (2003).
S. Nakaharai, T. Tezuka, N. Sugiyama, Y. Moriyama and S. Takagi, Characterization of 7-nm-thick strained Ge-on-insulator layer fabricated by Ge-condensation technique, Appl. Phys. Lett., 83(17), 3516–3518 (2003).
R. W. Olesinski and G. J. Abbaschian, Bull. Alloy Phase Diagram 5, 180 (1984).
Y. Ishikawa, N. Shibata and S. Fukatsu, Factors limiting the composition window for fabrication of SiGe-on-insulator substrate by low-energy oxygen implantation, Thin Solid Films, 369, 213–216 (2000).
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N. Sugiyama, T. Mizuno, M. Suzuki and S. Takagi, Formation of SiGe on Insulator Structure and Approach to Obtain Highly Strained Si layer for MOSFETs, Jpn. J. Appl. Phys. 40(4B) 2875–2880 (2001).
T. Tezuka, N. Sugiyama, S. Takagi, and T. Kawakubo, Dislocation-free formation of relaxed SiGe-on-insulator layers, Appl. Phys. Lett. 80(19), 3560–3562 (2002).
T. Tezuka, N. Sugiyama, and S. Takagi, Dislocation-free relaxed SiGe-on-insulator mesa structures fabricated by high-temperature oxidation, J. Appl. Phys., 94(12), 7553–7559 (2003).
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Ishikawa, Y., Shibata, N., Fukatsu, S. (2005). Achievement of SiGe-on-Insulator Technology. In: Flandre, D., Nazarov, A.N., Hemment, P.L. (eds) Science and Technology of Semiconductor-On-Insulator Structures and Devices Operating in a Harsh Environment. NATO Science Series II: Mathematics, Physics and Chemistry, vol 185. Springer, Dordrecht. https://doi.org/10.1007/1-4020-3013-4_6
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DOI: https://doi.org/10.1007/1-4020-3013-4_6
Publisher Name: Springer, Dordrecht
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