Silicon-on-Insulator Substrates with Buried Ground Planes (GPSOI)

Abstract

Advanced integrated circuits may employ SOI substrates and incorporate both analogue and digital systems on a single chip. These system-on-chip integrated circuits are susceptible to cross talk noise generated by the digital components. This paper addresses the issue and describes an SOI substrate produced by wafer bonding which incorporates a tungsten silicide ground plane layer. This ground plane layer suppresses the cross talk yielding a20 dB improvement in performance compared with alternative techniques. Double gate MOS capacitor structures have been manufactured on these GPSOI substrates and the overlying silicon layer has been shown to be of high quality, unaffected by the underlying silicide. The buried insulator layer incorporates undoped polysilicon which has been shown to act as a dielectric layer.