Abstract
This chapter presents a low power architecture of a Java processor. We show that the use of techniques like pipeline and the implementation of the stack in a register bank instead of using the main memory allow aggressive reduction of power dissipation, with a very small area overhead. Besides, thanks to the forwarding technique and to the specific stack machine organization, huge power savings can be obtained when applying this technique to a pipelined implementation of the architecture. Several examples of embedded applications are used to show the power savings obtained through the architecture optimization
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Beck, A.C.S., Cairo, L. (2006). Low Power Java Processor for Embedded Applications. In: Glesner, M., Reis, R., Indrusiak, L., Mooney, V., Eveking, H. (eds) VLSI-SOC: From Systems to Chips. IFIP International Federation for Information Processing, vol 200. Springer, Boston, MA. https://doi.org/10.1007/0-387-33403-3_14
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DOI: https://doi.org/10.1007/0-387-33403-3_14
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