Abstract
As demanding market segments require ever more complex, faster and denser circuits, high quality tests become essential to meet design specifications in terms of reliability, time-to-market, costs, etc. In order to achieve acceptable fault coverage for highly integrated systems, it is reasonable to expect that no other solution than design-for-test will be applicable in the near future. Therefore, testing tends to be dominated by embedded mechanisms to allow for accessibility to internal test points, to achieve on-chip test generation, on-chip test response evaluation, or even to make it possible the detection of errors concurrently to the circuit application. Within this context, an overview of existing test methods is given in this chapter, focusing on design-for-testability, built-in self-test and self-checking techniques suitable for digital and analog integrated circuits. Moreover, the application of these design-for-test techniques to integrated systems, implemented as multi-chip modules, microsystems or core-based integrated circuits, is also discussed
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Lubaszewski, M. (2006). Test and Design-for-Test: from Circuits to Integrated Systems. In: Reis, R., Lubaszewski, M., Jess, J.A. (eds) Design of Systems on a Chip: Design and Test. Springer, Boston, MA. https://doi.org/10.1007/0-387-32500-X_8
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