Two-pattern test generation with low power consumption based on LFSR

  • M. Puczko
  • V.N. Yarmolik


A method of logic synthesis for low-power design for two-patterns test sequence is presented in this paper. The idea of power consumption minimization by modifying the structure of LFSR (Linear Feedback Shift Register) have been proposed. In this paper some examples are included.

Key words

low power design two-test pattern built-in self-test switching activity Test Pattern Generator 


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Copyright information

© Springer Science+Business Media, Inc. 2005

Authors and Affiliations

  • M. Puczko
    • 1
  • V.N. Yarmolik
    • 1
  1. 1.Bialystok University of TechnologyBialystok

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