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xHDL: Extending VHDL to Improve Core Parameterization and Reuse

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Advances in Design and Specification Languages for SoCs

Abstract

Traditional hardware description languages are currently limited in their use to build complex systems through parameterization and reuse. In this chapter, we present xHDL, a meta-language designed to improve VHDL that provides flexible mechanisms for component customization, instantiation and interconnection. It has been conceived to ease the specification of highly parameterized cores and the reuse of already designed ones, keeping the currently available methodologies and synthesis tools. At the same time, it can help on parameter and component selection through the evaluation of functions that report on estimated characteristics of the design before the long synthesis phase. Finally, an FFT core illustrates the use of the meta-language for the specification of a complex design.

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© 2005 Springer

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Sánchez Marcos, M.A., Herrero, Á.F., López-Vallejo, M. (2005). xHDL: Extending VHDL to Improve Core Parameterization and Reuse. In: Boulet, P. (eds) Advances in Design and Specification Languages for SoCs. Springer, Boston, MA. https://doi.org/10.1007/0-387-26151-6_16

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  • DOI: https://doi.org/10.1007/0-387-26151-6_16

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-0-387-26149-2

  • Online ISBN: 978-0-387-26151-5

  • eBook Packages: EngineeringEngineering (R0)

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