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References
Philips Semiconductors, “SAA7199B, Digital Video Encoder (DENC) Data Sheet,” 1996.
J. Adélaide, et al, “Communication in a single-chip MPEG2 A/V/G decoder for digital set-top box application,” Proc. European Solid-State Circuits Conference (ESSCIRC), pp.348–351, Sep.1996.
T. Cummins, B. Murray, C. Prendergast, “A PAL/NTSC digital video encoder on 0.6 µm CMOS with 66 dB typical SNR, 0.4% differential gain, and 0.2° differential phase,” IEEE J. of Solid-State Circuits, Vol.32, No.7, pp.1091–1100, Jul.1997.
S.G. Smith et al, “A single-chip CMOS 306×244-pixel NTSC video camera and a descendant coprocessor device,” IEEE J. of Solid-State Circuits, Vol.33, pp.2104–11, Dec.1998.
H. Sanueli, “Broadband communications ICs: Enabling high-bandwidth connectivity in the home and office,” ISSCC Digest of Technical Papers, pp.26–28, Feb.1999.
M. Harrand, et al, “A single-chip CIF 30Hz H261, H263, and H263+video encoder/decoder with embedded display controller,” ISSCC Digest of Technical Papers, pp.268–269, Feb.1999.
Analog Devices Inc. “ADV7177/8 Integrated Digital CCIR-601 to PAL/NTSC Video Encoder Data Sheet,” 1998.
Conexant Systems, Inc “BT860/861 Multiport YcrCb to NTSC/PAL Digital Encoder Data Sheet,” 1999.
D’Luna, et al, “A universal cable set-top box system on a chip,” ISSCC Digest of Technical Papers, pp. 328–329, Feb.2001.
V. Gopinathan, Y. Tsividis, K. Tan, “A 5V 7th-order Elliptic analog filter for digital video applications,” ISSCC Digest of Technical Papers, pp.208–209, Feb.1990.
S.D. Willingham, K.W. Martin, “A BiCMOS low-distortion 8 MHz lowpass filter,” ISSCC Digest of Technical Papers, pp.114–115, Feb.1993.
B. Stefanelli, A. Kaiser, “A 2-µm CMOS fifth-order low-pass continuous-time filter for video-frequency applications,” IEEE J. Solid-State Circuits, Vol.28, No.7, pp.713–718, Jul.1993.
I. Bezzam, C. Vinn, R. Rao, “A fully-integrated continuous-time programmable CCIR 601 video filter,” ISSCC Digest of Technical Papers, pp.296–297, Feb.1995.
S. Barbu, Ph. Gandy, B. Guyot, H. Marie, “8-bit acquisition interface with fully integrated analog filter bank for PAL/SECAM/NTSC standards,” Proc. European Solid-State Circuits Conference (ESSCIRC), pp.91–21, Sep.1995.
Sang-Soo Lee, C.A. Laber, “A BiCMOS continuous-time filter for video signal processing applications,” IEEE J. Solid-State Circuits, Vol.33, No.9, pp.1373–1381, Sep.1998.
Microelectronics Modules Corporation, “Active Video Filter Product List,” 2001.
P. Senn, M.S. Tawfik, “Concepts for the restitution of video signals using MOS analog circuits,” in Proc. IEEE International Symposium on Circuits and Systems (ISCAS), pp.1935–38, 1988.
R.P. Martins, J.E. Franca, “A 2.4µm CMOS Switched-Capacitor video decimator with sampling rate reduction from 40.5 MHz to 13.5 MHz,” in Proc. IEEE Custom Integrated Circuits Conference (CICC), pp. 25.4/1–25.4/4, May 1989.
J.E. Franca, R.P. Martins, “Novel solutions for anti-aliasing and anti-imaging filtering in CMOS video interface systems,” in Proc. IEEE Workshop on Visual Signal Processing and Communications, Taiwan, Jun. 6–7, 1991.
J.E. Franca, A. Petraglia, S.K. Mitra, “Multirate analog-digital systems for signal processing and conversion,” Proceedings of The IEEE, Vol.85, No.2, pp.242–262, Feb.1997.
“Encoding parameters of digital television for studios,” CCIR International Radio Consultative Committee Recommendation, pp.601–602.
“Analog filter design for video A/D and D/A converters,” Application Note AN35, Brooktree Corporation, 1993.
R.E. Crochiere, L.R. Rabiner, Multirate Digital Signal Processing, Prentice-Hall, Inc., NJ, 1983.
Markku Renfors, Tapio Saramaki, “Recursive Nth-band digital filters-Part II: Design of multistage decimators and interpolators,” IEEE Trans. on Circuits and Systems, Vol.CAS-34, No.1, pp.40–51, Jan. 1987.
R. Ansari, Bede Liu-“Multirate Signal Processing,” Chapter 14 in Handbook for Digital Signal Processing, edited by Sanjit K. Mitra and James F. Kaiser, John Wiley & Sons, Inc., 1993.
Seng-Pan U, Impulse Sampled Switched-Capacitor Sampling Rate Converters, Master Thesis, University of Macau, 1997.
Seng-Pan U, R.P. Martins, J.E. Franca, “A novel Half-Band SC architecture for effective analog impulse sampled interpolation,” in Proc. of IEEE International Conference on Circuits, Electronics, and Systems, pp.389–403, Sep.1998.
A. Petraglia, S.K. Mitra, “Effects of coefficient inaccuracy in switched-capacitor transversal filters,” IEEE Trans. Circuits and Systems, Vol.38, No.9, pp.977–983, Sep. 1991.
Seng-Pan U, R.P. Martins, J.E. Franca, “Improved Switched-Capacitor interpolators with reduced sample-and-hold effects,” IEEE Trans. Circuits and Systems — II: Analog and Digital Signal Processing, Vol.47, No.8, pp.665–684, Aug. 2000.
Seng-Pan U, R.P. Martins, J.E. Franca, “A linear-phase Halfband SC video interpolation filter with coefficient-sharing and gain-& offset-compensation,” in Proc. The IEEE International Symposium on Circuits and Systems (ISCAS), Vol.III, pp.177–180, May 28–31, 2000.
Seng-Pan U, R.P. Martins, J.E. Franca, “High-frequency low-power multirate SC realizations for NTSC/PAL digital video filtering,” in Proc. The IEEE International Symposium on Circuits and Systems (ISCAS), Vol.I, pp.204–207, Sydney, May, 2001.
W.M.C. Sansen, P.M.V. Peteghem, “An area-efficient approach to the design of very-large time constants in Switched-Capacitor integrators,” IEEE J. of Solid-State Circuits, Vol.SC-19, No.5, pp.772–780, Oct.1984.
G.E.F-Verdad, F. Montecchi, “SC circuit for very large and accurate time constant integrators with low capacitance ratios,” IEE Electronics Letters, Vol.22, pp.1025–1027, Aug.1985.
Qiuting, Huang, “A novel technique for the reduction of capacitance spread in high-Q SC circuits,” IEEE Trans. Circuits and Systems, Vol.36, No.1, pp.121–126, Jan. 1989.
K. Nagaraj, “Parasitic-insensitive area-efficient approach to realizing very large time constants in Switched-capacitor,” IEEE Trans. Circuits and Systems, Vol.36, No.9, pp.1210–1216, Sep. 1989.
Wing-Hung Ki, Gabor, Temes, “Area-efficient gain-and offset-compensated very-large-constant SC biquads,” in Proc. The IEEE International Symposium on Circuits and Systems (ISCAS), pp.29–1029, May, 1993.
J. Lin, T. Edwards, S. Shamma, “Offset-compensated area-efficient Switched-Capacitor sum-gain amplifier,” in Proc. The IEEE International Symposium on Circuits and Systems (ISCAS), pp.1026–1029, May, 1993.
N.A. Radev, K.P. Ivanov, “Area-efficient gain-and offset-compensated very-large-time-constant SC integrator,” IEE Electronics Letters, Vol.36, pp.394–396, Mar.2000.
Qiuting Huang, “Mixed analog/digital, FIR/IIR realization of a linear-phase lowpass filter,” IEEE J. of Solid-State Circuits, Vol.31, No.9, pp.1347–1350, Sep.1996.
Seng-Pan U, Ho-Ming Cheong, Iu-Leong Chan, Keng-Meng Chan, U-Chun Chan, Mantou Liu, R.P. Martins, J.E. Franca, “An SC CCIR-601 video restitution filter with 13.5 Msample/S input and 108 Msample/S output,” in Proc. The 4th International Conference on ASIC (ASICON’2001), pp.374–377, Oct. 2001.
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(2006). Design of a 108 MHz Multistage SC Video Interpolating Filter. In: Design of Very High-Frequency Multirate Switched-Capacitor Circuits. The International Series in Engineering and Computer Science, vol 867. Springer, Boston, MA. https://doi.org/10.1007/0-387-26122-2_5
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