The chapter is based on the papers presented at International Test Conference (ITC'03) [171], Asian Test Symposium (ATS’03) [172], and Workshop on RTL and High-Level Testing WRTLT’02 [167].
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(2005). A Reconfigurable Power-Conscious Core Wrapper and its Application to System-on-Chip Test Scheduling. In: Introduction to Advanced System-on-Chip Test Design and Optimization. Frontiers in Electronic Testing, vol 29. Springer, Boston, MA. https://doi.org/10.1007/0-387-25624-5_10
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DOI: https://doi.org/10.1007/0-387-25624-5_10
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4020-3207-3
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