Simulation-Based Fault Injection and Testing Unsing the Mutation Technique
In contrast to traditional generation testing methods, the proposed approach considers faults that may occur at the functional level such as software faults. This Chapter shows therefore that mutation testing, up till now only used in software, is also highly efficient for hardware testing. At the functional level, mutation testing is a powerful and systematic method to detect design faults. Indeed, it guarantees many standard criteria such as instruction, branch, predicate and boundary value coverage. At the gate level, it was shown that mutation testing (carefully adapted to hardware) also detects efficiently hardware faults. To prove this method experimentally therefore, we have created a tool, named ALIEN, which has been implemented for the VHDL language.
Key wordsFunctional testing Mutation test design validation VHDL
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