5.5 Summary
First an overview of high-level system design was given to locate where and why power estimators come into play. The essence is that power estimators provide a criterion, minimal power consumption, that has to be optimised when comparing different architectural alternatives during system design. Next, a definition was given for an analog power estimator and requirements for a good estimator were discussed. The two main qualities are absolute accuracy and tracking accuracy. Then, two different approaches were presented and compared for the construction of power estimator functions: bottom-up and top-down. Next some theoretical estimator examples were discussed and their usefulness and shortcomings depicted. Finally, a few examples of practical power estimators were given, illustrating that in practice some kind of meet-in-the-middle strategy has to be used to generate good power estimates. The level at which topology-specific information has to be used varies from one analog circuit type to another, but inversely affects the generic properties of the estimator.
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© 2001 Kluwer Academic Publishers
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Lauwers, E., Gielen, G. (2001). High-Level Power Estimation of Analog Front-End Blocks. In: Wambacq, P., Gielen, G., Gerrits, J., van Leuken, R., de Graaf, A., Nouta, R. (eds) Low-Power Design Techniques and CAD Tools for Analog and RF Integrated Circuits. Springer, Boston, MA. https://doi.org/10.1007/0-306-48089-1_5
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DOI: https://doi.org/10.1007/0-306-48089-1_5
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