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Correction-Free Multi-Bit Sigma-Delta Modulators for ADSL

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Analog Circuit Design

Abstract

This chapter first presents a scalable MASH dual-quantization architecture and a companion optimum set of scaling coefficients which result into minimum resolution losses. The chapter then outlines the dominant circuit imperfections that degrade the operation of this architecture, and presents illustrative design exploration considerations induced by these circuit imperfections. Finally, some practical considerations pertaining to the implementation of an ADSL sigma-delta modulator in 0.25-μm CMOS technology are given and illustrated through experimental results.

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Author information

Authors and Affiliations

  1. CNM-CSIC Edif. CICA-CNM, Institute of Microelectronics of Seville, Avda. Reina Mercedes s/n, 41012, Sevilla, Spain

    R. del Río, F. Medeiro, J. M. de la Rosa, B. Pérez Verdú & A. Rodríguez Vázquez

Authors
  1. R. del Río
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  2. F. Medeiro
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  3. J. M. de la Rosa
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  4. B. Pérez Verdú
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  5. A. Rodríguez Vázquez
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Editor information

Editors and Affiliations

  1. Katholieke Universiteit Leuven, Leuven, Belgium

    Michiel Steyaert

  2. Eindhoven University of Technology, Eindhoven, The Netherlands

    Arthur van Roermund

  3. Delft University of Technology, Delft, The Netherlands

    Johan H. Huijsing

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© 2002 Kluwer Academic Publishers

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del Río, R., Medeiro, F., de la Rosa, J.M., Pérez Verdú, B., Rodríguez Vázquez, A. (2002). Correction-Free Multi-Bit Sigma-Delta Modulators for ADSL. In: Steyaert, M., van Roermund, A., Huijsing, J.H. (eds) Analog Circuit Design. Springer, Boston, MA. https://doi.org/10.1007/0-306-47951-6_11

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  • DOI: https://doi.org/10.1007/0-306-47951-6_11

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4020-7216-1

  • Online ISBN: 978-0-306-47951-9

  • eBook Packages: Springer Book Archive

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