Abstract
In this paper we examine the need for high dynamic linearity in high speed digital-analog converters for communications applications, and the challenges facing DAC designers attempting to maximize it. A brief discussion of a DAC designed for high dynamic linearity is then presented, followed by some predictions of future trends.
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© 2003 Kluwer Academic Publishers
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Bugeja, A.R. (2003). High Speed Digital-Analog Converters — The Dynamic Linearity Challenge. In: Huijsing, J.H., Steyaert, M., van Roermund, A. (eds) Analog Circuit Design. Springer, Boston, MA. https://doi.org/10.1007/0-306-47950-8_11
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DOI: https://doi.org/10.1007/0-306-47950-8_11
Publisher Name: Springer, Boston, MA
Print ISBN: 978-0-7923-7621-7
Online ISBN: 978-0-306-47950-2
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