Conclusion
We have overcome some of the limitations of existing ASIC tools for handling latch-based designs, providing a theoretically valid and working methodology for retiming latches by retiming flip-flops. We have demonstrated a successful approach to replacing flip-flops on critical paths by latches to speed up ASICs, providing actual speed improvements of 5% to 20% on real commercial designs.
In this chapter we outlined some of the limitations on latch-based ASIC designs. Hopefully, by showing that latches provide performance improvement over traditional flip-flop ASICs with minimal area penalty, future tools and standard cell libraries will provide more support for latch-based designs.
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Chinnery, D., Keutzer, K., Sanghavi, J., Killian, E., Sheth, K. (2004). Automatic Replacement of Flip-Flops by Latches in ASICs. In: Closing the Gap Between ASIC & Custom. Springer, Boston, MA. https://doi.org/10.1007/0-306-47823-4_7
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DOI: https://doi.org/10.1007/0-306-47823-4_7
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