Summary
Compatibility of SC circuits with standard VLSI processes is feasible using MOSFET gate capacitors. In this chapter, the charge-domain principle has been discussed, where the signal is processed within charge signal variables. Thus, the linearity of the transfer function is preserved as long as the circuit structures fulfill the required condition. Three basic operations have been presented, where their extensions to implement the more systematic applications will be discussed in Chapter 17. Interfacing the charge-domain processors with the voltage environment can be obtained by employing the linearity enhancement composite capacitor branches. Simulated verifications were carried out to demonstrate the effectiveness of these techniques and have shown significant improvement.
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References
D. B. Slater, Jr. and J. J. Paulos, “Low-Voltage coefficient capacitors for VLSI processes”, IEEE Journal of Solid-State Circuits, vol. 24, pp. 165–173, February 1989.
P. R. Gray and R. G. Meyer, Analysis and Design of Analog Integrated Circuits, 3rd edn., John Wiley & Sons, 1993.
P. E. Allen and D. R. Holberg, CMOS Analog Circuit Design. Oxford University Press, 1987.
D. A. Johns and K. Martin, Analog Integrated Circuit Design. John Wiley & Sons, 1997.
T. C. Choi, R. T. Kaneshiro, R. W. Brodersen, P. R. Gray, W. B. Jett and M. Wilcox, “High-frequency CMOS switched-capacitor filters for communications applications”, IEEE Journal of Solid-State Circuits, vol. SC-18, pp. 652–664, December 1983.
B. J. Hosticka, “Improvement of the gain of CMOS amplifiers”, IEEE Journal of Solid-State Circuits, vol. SC-14, pp. 1111–1114, December 1979.
K. Bult and G. J. G. M. Geelen, “A fast-settling CMOS op amp for SC circuits with 90-dB DC gain”, IEEE Journal of Solid-State Circuits, vol. 25, pp. 1379–1384, December 1990.
E. Sackinger and W. Guggenbuhl, “A high-swing, high-impedance MOS cascode circuit”, IEEE Journal of Solid-State Circuits, vol. 25, pp. 289–298, February 1990.
B. Y. Kamath, R. G. Meyer and P. R. Gray, “Relationship between frequency response and settling time of operational amplifiers”, IEEE Journal of Solid-State Circuits, vol. SC-9, pp. 347–352, December 1974.
J. E. Solomon, “The monolithic op amp: a tutorial study”, IEEE Journal of Solid-State Circuits, vol. SC-9, pp.314–332, December 1974.
P. R. Gray and R. G. Meyer, “MOS operational amplifier design-A tutorial overview”, IEEE Journal of Solid-State Circuits, vol. SC-17, pp. 969–982, December 1982.
Y. Tsividis and P. R. Gray, “An integrated NMOS operational amplifier with internal compensation”, IEEE Journal of Solid-State Circuits, vol. SC-11, pp. 748–753, December 1976.
H. Yoshizawa, Y. Huang, P. F. Ferguson and G. C. Temes, “MOSFET-only switched-capacitor circuits in digital CMOS technology”, IEEE Journal of Solid-State Circuits, vol. 34, pp. 734–747, June 1999.
B. K. Ahuja, “An improved frequency compensation techniques for CMOS operational amplifiers”, IEEE Journal of Solid-State Circuits, vol. SC-18, pp. 629–633, December 1983.
D. B. Ribner and M. A. Copeland, “Design techniques for cascoded CMOS op amps with improved PSRR and common-mode range”, IEEE Journal of Solid-State Circuits, vol. SC-19, pp. 919–925, December 1984.
M. Banu, J. M. Khoury and Y. Tsividis, “Fully differential operation amplifiers with accurate output balancing”, IEEE Journal of Solid-State Circuits, vol. 23, pp. 1410–1414, December 1988.
D. Senderowicz, S. F. Dreyer, J. H. Huggins, C. F. Rahim and C. A. Labr, “A family of differential NMOS analog circuits for a PCM codec filter chip”, IEEE Journal of Solid-State Circuits, vol. SC-17, pp. 1014–1023, December 1982.
R. Castello and P. R. Gray, “A high-performance micropower switchedcapacitor filter”, IEEE Journal of Solid-State Circuits, vol. SC-20, pp. 1122–1132, December 1985.
A. T. Behr, M. C. Schneider, S. N. Filho and C. G. Montoro, “Harmonic distortion caused by capacitors implemented with MOSFET gates”, IEEE Journal of Solid-State Circuits, vol. 27, pp. 1470–1475, October 1992.
D. J. Allstot and W. C. Black, Jr., “Technological design considerations for monolithic MOS switched-capacitor filtering systems”, Proceedings of the IEEE, vol. 71, pp. 967–986, August 1983.
H. Yoshizawa and G. C. Temes, “High-linearity switched-capacitor circuits in digital CMOS technology”, Proceedings of the IEEE International Symposium on Circuits and Systems, pp. 1029–1032, 1995.
H. Yoshizawa, G. C. Temes, P. Ferguson and F. Krummenacher, “Novel design techniques for high-linearity MOSFET-only switched-capacitor circuits”, Proceedings of the IEEE VLSI Circuit Symposium, pp. 152–153, 1996.
H. Yoshizawa, Y. Huang and G. C. Temes, “MOSFET-only switchedcapacitor circuits in digital CMOS technologies,” Proceedings of the IEEE International Symposium on Circuits and Systems, pp. 457–460, 1997.
K. Leelavattananon, C. Toumazou and J. B. Hughes, “Balanced compensation for highly linear MOSFET gate capacitor branch”, Electronics Letters, vol. 35, pp. 1409–1410, August 1999.
K. Leelavattananon, C. Toumazou and J. B. Hughes, “Linearity enhancement techniques for MOSFET-only SC circuits”, Proceedings of the IEEE International Symposium on Circuits and Systems, pp. V453–V456, 2000.
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Leelavattananon, K., Toumazou, C. (2002). Compatibility of SC Technique with Digital VLSI Technology. In: Toumazou, C., Moschytz, G., Gilbert, B., Kathiresan, G. (eds) Trade-Offs in Analog Circuit Design. Springer, Boston, MA. https://doi.org/10.1007/0-306-47673-8_16
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DOI: https://doi.org/10.1007/0-306-47673-8_16
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