Summary
This chapter has described the cycle-accurate style of specification in Verilog. This style is often used in high level simulation of systems and it is beginning to be used for behavioral synthesis. Since synthesis technology is still young, the restrictions on the language styles will evolve; the user manual for the tools must be consulted.
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© 2002 Kluwer Academic Publishers
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(2002). Cycle-Accurate Specification. In: The Verillog® Hardware Description Language. Springer, Boston, MA. https://doi.org/10.1007/0-306-47666-5_7
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DOI: https://doi.org/10.1007/0-306-47666-5_7
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4020-7089-1
Online ISBN: 978-0-306-47666-2
eBook Packages: Springer Book Archive