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Part of the book series: The International Series in Engineering and Computer Science ((SECS,volume 663))

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Summary

In summary, it is important for IC designers to understand that ESD protection circuit design is not about designing individual ESD protection structure itself. A working stand-alone ESD protection structure does not guarantee a functional IC chip. There exist strong ESD-circuit interactions. On one hand, the core circuit may affect the performance of ESD protection significantly, resulting in pre-mature ESD failures due to parasitic internal discharging structures. On the other hand, ESD protection structures have inevitable parasitic effects that influence the functionality of the core circuit substantially, including global clock signal integrity, almost all key circuit specifications and noise performance. This theory has been proved by practical circuit design examples. The solution to the ESD-circuit interaction problem is to design novel, low-parasitic, compact ESD protection structures. It is therefore imperative for IC designers to adopt a system approach in developing novel ESD protection solutions for any IC chips.

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References

  1. Feng, H. G., “A Mixed-Mode Simulation-Design Methodology for on-Chip ESD Protection Design”, MS Thesis, May, 2001.

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© 2002 Kluwer Academic Publishers

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Wang, A.Z.H. (2002). ESD-circuit Interactions. In: On-Chip ESD Protection for Integrated Circuits. The International Series in Engineering and Computer Science, vol 663. Springer, Boston, MA. https://doi.org/10.1007/0-306-47618-5_9

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  • DOI: https://doi.org/10.1007/0-306-47618-5_9

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-0-7923-7647-7

  • Online ISBN: 978-0-306-47618-1

  • eBook Packages: Springer Book Archive

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