Abstract
An application to perform a visual simulation of a machine based on MIPS is presented in this paper. The advantage of this system in relation to conventional simulators is that the simulation engine is the result of a real simulation under a VHDL development environment, so that hardware description can be modified and simulated in several ways to test and study its performance. So, it is possible to join the versatility of a commercial VHDL development tool with the simple handling of a graphic environment. In addition, an assembler language has been defined to write simple applications in order to test the simulated computer.
Key words
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Ashenden P.J., (1996). The Designers Guide to VHDL, Morgan Kaufmann Publisher.
Díaz, P., Plaza, A., García, F.J., Álvarez, J.M., Pavón, N. (1999). Manual Avanzado de Delphi 4. Anaya Multimedia.
Model Technology Inc. (1991). V-System PC, User”s Manual.
Patterson, D.A., Hennessy J.L. (1995). Organizatión y Diseño de Computadores. McGraw Hill.
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2000 Kluwer Academic Publishers
About this chapter
Cite this chapter
Álvarez Llorente, J.M., Pavó Pulido, N., Ballesteros Rubio, J. (2000). A Visual Simulation Environment for MIPS Based on VHDL. In: Ortega, M., Bravo, J. (eds) Computers and Education in the 21st Century. Springer, Dordrecht. https://doi.org/10.1007/0-306-47532-4_6
Download citation
DOI: https://doi.org/10.1007/0-306-47532-4_6
Publisher Name: Springer, Dordrecht
Print ISBN: 978-0-7923-6577-8
Online ISBN: 978-0-306-47532-0
eBook Packages: Springer Book Archive