Chapter Summary
High-speed CMOS circuit design is intimately related to the structures that can be fabricated on a silicon substrate and then be transferred to a manufacturing line for mass production. Many of the limitations found in modern chip design are related to the fabrication process.
As we have seen in our short discussion, the electrical characteristics of FETs are established by a fairly complex interplay of parameters and dependences in the process flow. Experienced design- ers always examine how these values affect the performance of a logic network, and try to work with a given set of electrical characteristics to achieve their goals. We will adhere to this philosophy through the remaining chapters of this book.
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(2002). Fabrication and Layout of CMOS Integrated Circuits. In: CMOS Logic Circuit Design. Springer, Boston, MA. https://doi.org/10.1007/0-306-47529-4_2
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DOI: https://doi.org/10.1007/0-306-47529-4_2
Publisher Name: Springer, Boston, MA
Print ISBN: 978-0-7923-8452-6
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