Summary
For a fully-integrated CMOS multi-standard receiver, RF circuits are the most challenging parts. The relatively low performance of CMOS RF circuits compared with their Bipolar counterpart is due to both the low gm of transistors and the lack of accurate modeling for MOS transistors and passive components, e.g. on-chip inductors. Thus smart design techniques at both the circuit and system levels are necessary. In this chapter,we briefly discussed the design issues of front-end LNAs and the frequency synthesizer design for multi-standard applications. A novel design approach for LNAs and a high-speed prescaler using CMOS single-ended DFF operating up to 2.5GHz are presented.
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© 2002 Kluwer Academic Publishers
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(2002). RF CMOS Building Blocks. In: Multi-Standard CMOS Wireless Receivers: Analysis and Design. The International Series in Engineering and Computer Science, vol 675. Springer, Boston, MA. https://doi.org/10.1007/0-306-47309-7_4
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DOI: https://doi.org/10.1007/0-306-47309-7_4
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4020-7032-7
Online ISBN: 978-0-306-47309-8
eBook Packages: Springer Book Archive