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Radiation Effects and Circuit Hardening

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Book cover Cmos Memory Circuits

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Abstract

The advent of extraterrestrial space utilization, and the requirements to operate many advanced military and some commercial systems in radioactive environments, brought the radiation hardening of semiconductor integrated circuits to the mainstream of the technological developments. Among the various CMOS integrated circuit types, the CMOS memory circuits manifest the highest susceptibility to the effects of radioactive radiation events and, usually, their hardness limits the applicability of the system in radiation environments. To improve the radiation hardness of CMOS memories special processing, device and circuit techniques can be used. This final chapter introduces those radiation effects on CMOS-bulk and CMOS SOI (SOS) transistor devices and circuits which are important to memory designs, and discloses the circuit and design techniques which may be applied to enhance the radiation hardness of CMOS-bulk and CMOS SOI (SOS) memories. The presentation of CMOS SOI (SOS) supports both hardened and nonhardened designs and includes the effects of floating substrates, side- and back-channels, and diode-like nonlinear elements.

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© 2002 Kluwer Academic Publishers

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(2002). Radiation Effects and Circuit Hardening. In: Cmos Memory Circuits. Springer, Boston, MA. https://doi.org/10.1007/0-306-47035-7_6

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  • DOI: https://doi.org/10.1007/0-306-47035-7_6

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-0-7923-7950-8

  • Online ISBN: 978-0-306-47035-6

  • eBook Packages: Springer Book Archive

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