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Introduction

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References

  1. K. Fukahori and P. R. Gray, “Computer simulation of integrated circuits in the presence of electrothermal interaction,” IEEE Journal of Solid-State Circuits, vol. 11, pp. 834–846, Dec. 1976.

    Google Scholar 

  2. L. W. Nagel, SPICE2: A Computer Program to Simulate Semiconductor Circuits. PhD thesis, Dept. of Electrical Engineering, Univ. of California at Berkeley, 1975.

    Google Scholar 

  3. M. Latif and P. R. Bryant, “Network analysis approach to multidimensional modeling of transistors including thermal effects,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, pp. 94–101, Apr. 1982.

    Google Scholar 

  4. S. S. Lee and D. J. Allstot. “Electrothermal simulation of integrated circuits,” IEEE Journal of Solid-State Circuits, vol. 28, pp. 1283–1293, Dec. 1993.

    Google Scholar 

  5. J. A. Meijerink and H. A. van der Vorst, Mathematics of Computation, vol. 31, pp. 148–162, 1977.

    MathSciNet  Google Scholar 

  6. L. T. Pillage and R. A. Rohrer, “Asymptotic wave form evaluation for timing analysis,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 9, pp. 352–366, Apr. 1990.

    Google Scholar 

  7. G. A. Baker Jr., Essentials of Pade Approximants. New York, NY Academic Press, 1975.

    Google Scholar 

  8. C. H. Diaz, S. M. Kang, and C. Duvvury, “Circuit-level electrothermal simulation of electrical overstress failures in advanced MOS I/O protection devices,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 13, pp. 482–493, Apr. 1994.

    Google Scholar 

  9. C. H. Diaz and S. M. Kang, “New algorithms for circuit simulation of device breakdown,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 11, pp. 1344–1354, Nov. 1992.

    Google Scholar 

  10. V. Dwyer, A. Franklin, and D. Campbell, “Thermal failure in semiconductor devices,” Solid-State Electronics, vol. 33, pp. 553–560, May 1990.

    Google Scholar 

  11. T. Li, C. H. Tsai, and S. M. Kang, “Efficient transient electrothermal simulation of CMOS VLSI circuits under electrical overstress,” in Proceedings of the ACM/IEEE International Conference on Computer-Aided Design, pp. 6–11, Nov. 1998.

    Google Scholar 

  12. Y. K. Cheng, P. Raha., C. C. Teng, E. Rosenbaum, and S. M. Kang, “ILLIADS-T: An electrothermal timing simulator for temperature-sensitive reliability diagnosis of CMOS VLSI chips,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 17, pp. 668–681, Aug. 1998.

    Google Scholar 

  13. Y. H. Shih, Y. Leblebici, and S. M. Kang, “ILLIADS: A fast timing and reliability simulator for digital MOS circuits,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 12, pp. 1387–1402, Sept. 1993.

    Google Scholar 

  14. Y. K. Cheng and S. M. Kang, “Improvement on Chip-Level Electrothermal Simulator-ILLIADS-T,” in Proceedings of the IEEE International Symposium on Circuits and Systems, May 1996.

    Google Scholar 

  15. A. Dharehoudhury, S. M. Kang, K. H. Kim, and S. H. Lee, “Fast and accurate timing simulation with regionwise quadratic models of MOS I–V characteristics,” in Proceedings of the ACM/IEEE International Conference on Computer-Aided Design, pp. 208–211, Nov. 1994.

    Google Scholar 

  16. R. Darveaux, I. Turlik, L. T. Hwang, and A. Reisman, “Thermal stress analysis of a multichip package design,” IEEE Transactions on Components, Hybrids, and Manufacturing Technology, vol. 12, pp. 663–672, Dec. 1989.

    Google Scholar 

  17. C. P. Wan and B. J. Sheu, “Temperature dependence modeling for MOS VLSI circuit simulation,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 8, pp. 1065–1073, Oct. 1989.

    Google Scholar 

  18. A. M. Hill, Switching Density Analysis for Power and Reliability in VLSI Circuits. PhD thesis, Dept. of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign, 1996.

    Google Scholar 

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© 2002 Kluwer Academic Publishers

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(2002). Introduction. In: Electrothermal Analysis of VLSI Systems. Springer, Boston, MA. https://doi.org/10.1007/0-306-47024-1_1

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  • DOI: https://doi.org/10.1007/0-306-47024-1_1

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-0-7923-7861-7

  • Online ISBN: 978-0-306-47024-0

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