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Computation of Gate-Induced-Drain-Leakage Current Due to Band-to-Band Tunneling for Ultrathin MOSFET

  • Krishnendu Roy
  • Anal Roy Chowdhury
  • Arpan DeyasiEmail author
Conference paper
Part of the Lecture Notes in Networks and Systems book series (LNNS, volume 79)

Abstract

In this paper, gate-induced-drain-leakage current due to band-to-band tunneling is analytically computed in nanometric MOSFET under high electric field. Fowler-Nordheim tunneling current is first calculated for different dielectric thicknesses with some alteration of Hu’s model, and dominance of thermionic current is established. Under this criterion, B–B tunneling current is evaluated as leakage arises due to the overlap of gate over source and drain regions, and dielectric properties along with doping concentration and temperature are taken into account following Kane’s tunneling probability. Role of high-K dielectric material is also analyzed for nanoscale application. Result shows that higher overlapping of gate length due to lateral diffusion of source and drain regions tailors the leakage current. Findings are extremely important for use of the device as SRAM.

Keywords

Gate-induced-drain-leakage Gate overlap length High-K dielectric Band-to-band tunneling Doping concentration Dielectric thickness 

References

  1. 1.
    ITRS Roadmap, 2007Google Scholar
  2. 2.
    Gupta, K.A., Anvekar, D.K., Venkateswarlu, V.: Comparative study and analysis of short channel effects for 180 nm and 45 nm transistors. In: Advances in Computing and Information Technology: Advances in Intelligent Systems and Computing, vol. 178, chap. 69, pp. 707–715 (2013)Google Scholar
  3. 3.
    Chaudhry, A., Kumar, M.J.: Controlling short-channel effects in deep-submicron SOI MOSFETs for improved reliability: a review. IEEE Trans. Device Mater. Rel. 4(1), 99–109 (2004)CrossRefGoogle Scholar
  4. 4.
    Cheng, H.W., Li, Y.: 16-nm multigate and multifin MOSFET device and SRAM circuits. In: International Symposium on Next-Generation Electronics (2010)Google Scholar
  5. 5.
    Subramanian, V.: Multiple gate field-effect transistors for future CMOS technologies. IETE Tech. Rev. 27(6), 446–454 (2010)CrossRefGoogle Scholar
  6. 6.
    Mudanai, S., Fan, Y.Y., Ouyang, Q., Tasch, A.F., Banerjee, S.K.: Modeling of direct tunneling current through gate dielectric stacks. IEEE Trans. Electron Devices 47(10), 1851–1857 (2000)CrossRefGoogle Scholar
  7. 7.
    Tiefeng, W., Zhichao, Z., Quan, W., Lizhi, G., Jing, L.: An algorithm on direct tunneling current model based on DIBL effect. In: International Conference on Chemical, Material and Food Engineering, Atlantis Press, pp. 719–722 (2015)Google Scholar
  8. 8.
    Amin, S.I., Sarin, R.K.: Direct tunneling gate current model for symmetric double gate junctionless transistor with SiO2/High-K gate stacked dielectric. J. Semicond. 37(3), 034001 (2016)CrossRefGoogle Scholar
  9. 9.
    Oh, S.J., Yeow, Y.T.: A modification to the fowler-nordheim tunneling current calculation for thin MOS structures. Solid State Electron. 31(6), 1113–1118 (1988)CrossRefGoogle Scholar
  10. 10.
    Mondal, I., Dutta, A.K.: An analytical gate tunnelling current model for MOSFETs having ultrathin gate oxides. IEEE Trans. Electron Devices 55(7), 1682–1692 (2008)CrossRefGoogle Scholar
  11. 11.
    Hong, S.H., Jang, J.H., Park, T.J., Jeong, D.S., Kim, M., Hwang, C.S.: Improvement of the current-voltage characteristics of a tunneling dielectric by adopting a Si3N4∕SiO2∕Si3N4 multilayer for flash memory application. Appl. Phys. Lett. 87, 152106 (2005)CrossRefGoogle Scholar
  12. 12.
    Cassan, E., Dollfus, P., Galdin, S., Hesto, P.: Calculation of direct tunneling gate current through ultra-thin oxide and oxide/nitride stacks in MOSFETs and H-MOSFETs. Microelectron. Reliab. 40(4–5), 585–588 (2000)CrossRefGoogle Scholar
  13. 13.
    Lai, P.T., Jingping, X., Liu, B.Y., Xu, Z.: New observation and improvement in GIDL of N-MOSFET’s with various kinds of gate oxides under hot-carrier stress. In: IEEE International Conference on Semiconductor Electronics (1996)Google Scholar
  14. 14.
    Chang, L., Yang, K.J., Yeo, Y.C., Polishchuk, I., King, T.J., Hu, C.: Direct-tunneling gate leakage current in double-gate and ultrathin body MOSFETs. IEEE Trans. Electron Devices 49(12), 2288–2295 (2002)CrossRefGoogle Scholar
  15. 15.
    Lee, W.C., Hu, C.: Modeling CMOS tunneling currents through ultrathin gate oxide due to conduction- and valence-band electron and hole tunneling. IEEE Trans. Electron Devices 48(7), 1366–1373 (2001)CrossRefGoogle Scholar
  16. 16.
    Cai, J., Sah, C.T.: Gate tunneling currents in ultrathin oxide metal-oxide-silicon transistors. J. Appl. Phys. 89(4), 2272–2285 (2001)CrossRefGoogle Scholar
  17. 17.
    Nathan, V., Das, N.C.: Gate-induced drain leakage current in MOS devices. IEEE Trans. Electron Devices 40(10), 1888–1890 (1993)CrossRefGoogle Scholar
  18. 18.
    Chen, J., Chan, T.Y., Chen, I.C., Ko, P.K., Hu, C.: Subbreakdown drain leakage current in MOSFET. IEEE Electron Device Lett. 8(11), 515–517 (1987)CrossRefGoogle Scholar
  19. 19.
    Semenov, O., Pradzynski, A., Sachdev, M.: Impact of gate induced drain leakage on overall leakage of submicrometer CMOS VLSI circuits. IEEE Trans. Semicond. Manuf. 15(1), 9–18 (2002)CrossRefGoogle Scholar
  20. 20.
    Choi, Y.K., Ha, D., King, T.J., Bokor, J.: Investigation of gate-induced drain leakage (GIDL) current in thin body devices: single-gate ultra-thin body, symmetrical double-gate, and asymmetrical double-gate MOSFETs. Jpn. J. Appl. Phys. 42, 2073–2076 (2003)CrossRefGoogle Scholar
  21. 21.
    Dai, C.H., Chang, T.C., Chu, A.K., Kuo, Y.J., Ho, S.H., Hsieh, T.Y., Lo, W.H., Chen, C.E., Shih, J.M., Chung, W.L., Dai, B.S., Chen, H.M., Xia, G., Cheng, O., Huang, C.T.: Hot carrier effect on gate-induced drain leakage current in high-K/metal gate n-channel metal-oxide-semiconductor field-effect transistors. Appl. Phys. Lett. 99, 012106 (2011)CrossRefGoogle Scholar

Copyright information

© Springer Nature Singapore Pte Ltd. 2020

Authors and Affiliations

  • Krishnendu Roy
    • 1
  • Anal Roy Chowdhury
    • 1
  • Arpan Deyasi
    • 2
    Email author
  1. 1.Department of Electronic ScienceA.P.C CollegeBarasatIndia
  2. 2.Department of Electronics and Communication EngineeringRCC Institute of Information TechnologyKolkataIndia

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