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Hardware Partitioning Using Parallel Genetic Algorithm to Improve the Performance of Multi-core CPU

  • Suryakanta Nayak
  • Mrutyunjaya Panda
Conference paper
Part of the Lecture Notes in Networks and Systems book series (LNNS, volume 109)

Abstract

Hardware partitioning has been evolved as a crucial step in hardware (HW) design during the process of hardware floor plan optimization. Even though some researchers tried to apply genetic algorithm to address the hardware partitioning problem, no researches are found in applying the parallel genetic algorithm for better process optimization. This paper deals with the parallel genetic algorithms which required a correction technique for the hardware partitioning on CPU and GPU. The foremost advantage of the proposed work is the reduction of total run time for a specified dimension by VLSI circuit through said genetic algorithm of multi-core CPU as well as GPU. Moreover, the proposed approach provides a huge effective parallel computing environment where hundreds of asymmetrical computing stages are described in multi-core CPU and GPU. Further, to enhance the effectiveness of the suggested technique, we formulate an asynchronous switch pattern procedure to correlate both CPU and GPU. The circuit partitioning process covers the transfer procedure and computation approach, which leads to a significant reduction in run time in comparison with other existing approaches.

Keywords

Multi-core CPU Genetic algorithm Hardware design Heuristic method 

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Copyright information

© Springer Nature Singapore Pte Ltd. 2020

Authors and Affiliations

  • Suryakanta Nayak
    • 1
  • Mrutyunjaya Panda
    • 1
  1. 1.Department of Computer Science and ApplicationUtkal UniversityBhubaneswarIndia

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