Design Techniques of Flash ADC: Review

Conference paper
Part of the Lecture Notes in Electrical Engineering book series (LNEE, volume 614)


Most of the signals available in nature are analog. Since sensor operates in analog domain, data converters play an important role in transformation of these signals to digital form or vice versa in real-world applications. Various techniques are used to develop analog-to-digital converters (ADC) and these are designed in trade-off of power, speed and area. Few of the techniques are Flash type, successive approximation, sigma-delta, counter type ADC, dual-slope ADC, etc. Each type has its own advantages and limitations. For high-speed applications, Flash ADC is considered to be best candidate. Optimized comparator and decoder designs can contribute in reduction of power consumption. Since electronic devices are becoming portable, Flash ADCs are integrated with SoC configuration. Linear operation, overall size reduction and improved performance are expected features of the design to achieve the same.


Flash ADC Comparator Thermometer code Power dissipation and encoder 


  1. 1.
    Hsia SC, Lee WC (2005) A very low-power Flash A/D converter based on CMOS inverter circuit. In: Proceedings of the 9th international database engineering & application symposium (IDEAS’05). IEEE, pp 107–110Google Scholar
  2. 2.
    Ali SM, Raut R, Sawan M (2005) A power efficient decoder for 2 GHz, 6-bit CMOS Flash-ADC architecture. In: Proceedings of the 9th international database engineering & application symposium (IDEAS’05). IEEE, pp 123–126Google Scholar
  3. 3.
    Sung BRS et al (2009) A time-interleaved flash-SAR architecture for high speed A/D conversion. IEEE, pp 984–987Google Scholar
  4. 4.
    Hiremath V, Ren S (2011) A novel ultra high speed reconfigurable switching encoder for Flash ADC. In: IEEE Aerospace and electronics conference (NAECON), pp 320–323Google Scholar
  5. 5.
    Reddy MS, Rahaman ST (2013) An effective 6-bit Flash ADC using low power CMOS technology. In: 15th international conference on advanced computing technologies (ICACT). IEEE, pp 1–4.Google Scholar
  6. 6.
    Devadiga R, Rao S (2018) Design of 4-bit Flash ADC using inverter threshold comparator in 45 nm technology. In: 2018 international conference on inventive research in computing applications (ICIRCA). Coimbatore, pp 978–982Google Scholar
  7. 7.
    Akiyama S, Waho T (2006) A 6-bit low-power compact Flash ADC using current-mode threshold logic gates. In: 2006 IEEE international symposium on circuits and systems. Island of Kos, pp 3938–3941Google Scholar
  8. 8.
    Sai Kumar K et al (2018) A high speed flash analog to digital converter. In: Proceedings of the second international conference on I-SMACI. IEEE, pp 283–288Google Scholar
  9. 9.
    Veeramachanen S, Kumar AM, Tummala V, Srinivas MB (2009) Design of a low power, variable-resolution Flash ADC. In: 2009 22nd international conference on VLSI design. New Delhi, pp 117–122Google Scholar
  10. 10.
    Yoo J, Choi K, Ghaznavi J (2003) Quantum voltage comparator for 0.07 µm CMOS flash A/D converters. In: IEEE computer society annual symposium on VLSI, pp 281–281Google Scholar
  11. 11.
    Sharma G, Arora H, Chawla J, Ramzai J (2015) Comparative analysis of 2-bit magnitude comparator using various high performance techniques. In: IEEE communication and signal processing, pp 0079–0083Google Scholar
  12. 12.
    Sireesha R, Kumar A (2015) Design of low power 0.8 V Flash ADC using TIQ in 90 nm Technology. In: International conference on smart technology and management, pp 406–410Google Scholar
  13. 13.
    Nazir L, Khurshid B, Mir RN (2015) A 7 GS/s, 1.2 V. Pseudo logic encoder based Flash ADC using TIQ technique. In: Annual IEEE India conference, pp 1–6Google Scholar
  14. 14.
    Manikandan A, Ajayan J, Kavin Arasan C (2015) High speed low power 64-bit comparator designed using current comparison based domino logic. In: International conference on electronics and communication systems, pp 156–161Google Scholar
  15. 15.
    Megha R, Pradeepkumar KA (2014) Implementation of low power Flash ADC by reducing comparators. In: International conference on communication and signal processing, pp 443–447Google Scholar
  16. 16.
    Biswas S, Das JK, Prasad R (2015) Design and implementation of 4 bit Flash ADC using low power low offset dynamic comparator. Electrical, electronics, signals, communication and optimization, pp 1–6Google Scholar

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© Springer Nature Singapore Pte Ltd. 2020

Authors and Affiliations

  1. 1.Department of ECENMAM Institute of TechnologyNitteIndia

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