Surface Potential Profile of Nano Scaled Work Function Engineered Gate Recessed IR Silicon on Insulator MOSFET
In this present analysis, we represent the surface potential profile of horizontally graded binary metal alloy gate (work function engineered gate) recessed source/drain (Re S/D) SOI/SON MOSFET with additional insulator region (I-SOI). The proposed structure is akin to that of the recessed S/D SOI MOSFET with the exception that there is an insulator region of high-k dielectric in between the channel and drain region. The analytical surface potential model has been developed by solving two-dimensional Poisson’s equation in the channel region considering appropriate boundary condition with a parabolic potential profile.
KeywordsHigh-k dielectric Short channel effects (SCEs) Recessed source/drain (Re S/D) Work function engineered gate (WFEG)
- 1.Miura-Mattausch, M., Mattausch, H.J., Ezaki, T.: The Physics and modeling of MOSFET. World Scientific Publishing Co. Pte. Ltd., Singapore (2008)Google Scholar
- 8.Manna, B., Sarkhel, S., Ghosh, A., Singh, S.S., Sarkar, S.K.: Dual material gate nanoscale SON MOSFET: for better performance. Int. J. Comput. Appl. (IJCA) (2013). ISBN: 973-93-80875-27-15Google Scholar
- 12.Reddy, V., Jagadesh Kumar, M.: A new dual-material double-gate (DMDG) nanoscale SOI MOSFET-twodimensional analytical modeling and simulation. IEEE Trans. Electron. Dev. 4(2), 260–268 (2005)Google Scholar