Design and Analysis of 4-Bit Squarer Circuit Using Minority and Majority Logic in MagCAD

  • Saurabh Kumar
  • R. Marimuthu
  • S. BalamuruganEmail author
Conference paper
Part of the Advances in Intelligent Systems and Computing book series (AISC, volume 1057)


One of the recent advances for the beyond complementary metal-oxide semiconductor (CMOS) area is nano-magnetic logic (NML). Many researchers are developing a keen interest in the areas of circuit designing, area optimization and its application in storing the data. Because of its inherent magnetic nature, it can be used to design any magnetic circuit. When compared to the CMOS technology NML logic has potential advantages in terms of non-volatile, low power and radiation in hard. In this paper, we have proposed and implemented a 4-bit squarer circuit using the perpendicular NML (pNML). Squarer design is implemented in MagCAD tool, which embeds design rules, physical models and technological parameters. A register-transfer-level of (VHDL) of the circuit is automatically extracted by MagCAD. The extracted model can be simulated with fast HDL-simulators; this makes it possible to verify the behavior and extract the performance of the designed circuit. This nano-magnetic logic technology is alternative to CMOS technology, which is non-volatile in nature with reduced power consumption.


Nano-magnetic logic Emerging technologies Squarer Majority-based logic MagCAD 


  1. 1.
    International technology roadmap of semiconductors 2.0. Beyond CMOS. (2015)
  2. 2.
    Conte, T.M., DeBenedictis, E.P., Gargini, P.A., Track, E.: Rebooting computing: the road ahead. Computer 50(1), 20–29 (2017)CrossRefGoogle Scholar
  3. 3.
    Chumak, A.V., Vasyuchka, V.I., Serga, A.A., Hillebrands, B.: Magnon spintronics. Nat. Phys. 11(6), 453 (2015)CrossRefGoogle Scholar
  4. 4.
    Labrado, C., Thapliyal, H., Lombardi, F.: Design of majority logic based approximate arithmetic circuits. In: IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1–4 (2017)Google Scholar
  5. 5.
    Ferrara, A., Garlando, U., Gnoli, L., Santoro, G., Zamboni, M.: 3D design of a pNML random access memory. In: 13th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), pp. 5–8. IEEE (2017)Google Scholar
  6. 6.
    Turvani, G., Riente, F., Plozner, E., Vacca, M., Graziano, M., Gamm, S.B.V.: A pNML compact model enabling the exploration of three-dimensional architectures. IEEE Trans. Nanotechnol. 16(3), 431–438 (2017)CrossRefGoogle Scholar
  7. 7.
    Agrawal, S., Harish, G., Balamurugan, S., Marimuthu, R.: Design of high speed 5:2 and 7:2 compressor using nanomagnetic logic. In: VDAT 2018 (Accepted for Publication in Springer)Google Scholar
  8. 8.
    Riente, F., Garlando, U., Turvani, G., Vacca, M., Roch, M.R., Graziano, M.: MagCAD: tool for the design of 3-D magnetic circuits. IEEE J. Explor. Solid-State Comput. Devices Circ. 3, 65–73 (2017)CrossRefGoogle Scholar
  9. 9.
    Garlando, U., Riente, F., Zamboni, M., Graziano, M.: Topolinano & MagCAD: A design and simulation framework for the exploration of emerging technologiesGoogle Scholar
  10. 10.
    Cho, K.J., Chung, J.G.: Parallel squarer design using pre-calculated sums of partial products. Electron. Lett. 43(25), 1414–1416 (2007)CrossRefGoogle Scholar
  11. 11.
    Kolagotla, R.K., Griesbach, W.R., Srinivas, D.H.: VLSI implementation of 350 MHz 0.35/spl mu/m 8 bit merged squarer. Electron. Lett. 34(1), 47–48 (1998)CrossRefGoogle Scholar
  12. 12.
    Gu, Z., Nowakowski, M.E., Carlton, D.B., Storz, R., Hong, J., Chao, W., Lambson, B., Bennett, P., Alam, M.T., Marcus, M.A., Doran, A.: Speed and reliability of nanomagnetic logic technology (2014). arXiv:1403.6490
  13. 13.
    Riente, F., Ziemys, G., Turvani, G., Schmitt-Landsiedel, D., Gamm, S.B.V., Graziano, M.: Towards logic-in-memory circuits using 3d-integrated nanomagnetic logic. In: IEEE International Conference on Rebooting Computing (ICRC), pp. 1–8. IEEE (2016)Google Scholar
  14. 14.
    Imre, A.: Experimental study of nanomagnets for Quantum-dot cellular automata(MQCA) logic applications, Ph.D. thesis, University of Notre Dame, Notre Dame, Indiana, Dec 2005Google Scholar
  15. 15.
    Labrado, C.: Exploration of majority logic based designs for arithmetic circuits. Master’s thesis, University of Kentucky (2017)Google Scholar
  16. 16.
    Breitkreutz, S., Kiermaier, J., Eichwald, I., Hildbrand, C., Csaba, G., Schmitt-Landsiedel, D., Becherer, M.: Experimental demonstration of a 1-bit full adder in perpendicular nanomagnetic logic. IEEE Trans. Magn. 49(7), 4464–4467 (2013)CrossRefGoogle Scholar
  17. 17.
    Muller, J.-M.: Elementary Functions. Springer (2006)Google Scholar
  18. 18.
    Meher, P.K., Stouraitis, T.: Arithmetic Circuits for DSP Applications. Wiley (2017)Google Scholar

Copyright information

© Springer Nature Singapore Pte Ltd. 2020

Authors and Affiliations

  1. 1.School of Electrical EngineeringVellore Institute of TechnologyVelloreIndia

Personalised recommendations