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An FPGA-Based Balanced and High-Efficiency Two-Dimensional Data Access Technology for Real-Time Spaceborne SAR

  • Tianyuan Sun
  • Bingyi Li
  • Xiaoning Liu
  • Yizhuang XieEmail author
Conference paper
Part of the Lecture Notes in Electrical Engineering book series (LNEE, volume 517)

Abstract

With the development of satellite load and very large scale integrated (VLSI) circuit technology, spaceborne real-time synthetic aperture radar (SAR) imaging systems have become a solution for rapid response to hazards. Through analyzing the algorithm pipeline flow as well as introducing the storage-computation model, a balanced and high-efficiency 2-D data access technology based on cross-mapping data storage method has been achieved to suit the large point processing for real-time spaceborne SAR system. A prototype based on NetFPGA-SUME board with Xilinx XC7VX690T is given to verify the performance of the proposed design. Taking Stripmap SAR imaging of 16384 * 16384 granularity raw data (5 m resolution, 25 km width) as an example, the imaging based on chirp scaling algorithm takes 6.63 s, which is better than some other real-time processing methods.

Keywords

SAR Real-time processing FPGA parallel accelerating component 

Notes

Acknowledgements

This work was supported by the National Natural Science Foundation of China under Grant 31727901, and the Hundred Leading Talent Project of Beijing Science and Technology under Grant Z141101001514005.

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Copyright information

© Springer Nature Singapore Pte Ltd. 2020

Authors and Affiliations

  • Tianyuan Sun
    • 1
    • 2
  • Bingyi Li
    • 1
    • 2
  • Xiaoning Liu
    • 1
    • 2
  • Yizhuang Xie
    • 1
    • 2
    Email author
  1. 1.Radar Research Lab, School of Information and ElectronicsBeijing Institute of TechnologyBeijingChina
  2. 2.Beijing Key Laboratory of Embedded Real-Time Information Processing TechnologyBeijingChina

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