Open-Loop Carrier Synchronization Design and Its FPAG Implementation for Short Burst Communication at Low SNR

  • Wen CheEmail author
  • Jinhui Fang
Conference paper
Part of the Lecture Notes in Electrical Engineering book series (LNEE, volume 517)


The paper presents a design for open-loop carrier synchronization which is suitable for short burst communication at low SNR and it is easy to implement on FPGA platform. The proposed open-loop carrier synchronization is based on V&V and FFT algorithm which estimate both the frequency offset and the phase offset. We also implement a post-processing to solve the problem of phase ambiguity. The simulation results show that our proposed algorithm can work efficiently. Besides, the algorithm is implemented with a Xilinx XC7VX690T FPGA chip which achieves good performance under the condition of large frequency offset and low signal-to-noise ratio.


Carrier synchronization V&V algorithm FFT FPGA Burst communication 


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© Springer Nature Singapore Pte Ltd. 2020

Authors and Affiliations

  1. 1.School of Information and ElectronicsBeijing Institute of TechnologyBeijingChina

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