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m-Mode SVPWM for Multilevel Inverter

  • Bo ZhangEmail author
  • Dongyuan Qiu
Chapter
Part of the CPSS Power Electronics Series book series (CPSS)

Abstract

Compared with the aforementioned two-level inverter, the multilevel inverter can further reduce the harmonics of the output voltage and current. However, the structure of the multilevel inverter is more complicated, which makes the design of the SVPWM switching sequences more difficult. Besides, the issues such as capacitor voltage balance should also be considered. Therefore, the m-mode SVPWM is more practical for the multilevel inverters. In this chapter, the topologies and the existing SVPWM of the multilevel inverter are analyzed first.

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Copyright information

© Springer Nature Singapore Pte Ltd. 2019

Authors and Affiliations

  1. 1.School of Electric PowerSouth China University of TechnologyGuangzhouChina

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