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Development of Fast Readout System for Counting-Type SOI Detector ‘CNPIX’

  • Ryutaro Nishimura
  • Yasuo Arai
  • Toshinobu Miyoshi
  • Shunji Kishimoto
  • Ryo Hashimoro
  • Longlong Song
  • Yunpeng Lu
  • Qun Ouyang
Conference paper
Part of the Springer Proceedings in Physics book series (SPPHY, volume 212)

Abstract

We are developing a data readout system for a new photon-counting type SOI detector ‘CNPIX’. CNPIX detector will contain ~100 k hexagonal pixels and frame rates more than 1 kHz is demanded to observe dynamic structure of the samples. We adopt KC705 evaluation board equipped with Kintex-7 FPGA, DDR3 memory, and Gigabit Ethernet interface as the base of our new system to meet this demand. The CNPIX detector signals are connected through FPGA mezzanine card interface.

Keywords

SOI Photon-Counting Pixel detector 

Notes

Acknowledgement

This study is supported in part by JSPS KAKENHI Grant Number 25109008, and this study is performed as a part of the SOIPIX group [3] research activity.

References

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    Xilinx Inc.: KC705 evaluation board for the Kintex-7 FPGA user guide. In: Xilinx Documents UG810 (v1.7). Xilinx (2016)Google Scholar
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    Nishimura, R., et al.: Development of high-speed X-ray imaging system for SOI pixel detector. In: Proceedings of the 20th International Workshop on Advanced Image Technology 2017 (IWAIT 2017)Google Scholar

Copyright information

© Springer Nature Singapore Pte Ltd. 2018

Authors and Affiliations

  • Ryutaro Nishimura
    • 1
  • Yasuo Arai
    • 2
  • Toshinobu Miyoshi
    • 2
  • Shunji Kishimoto
    • 3
  • Ryo Hashimoro
    • 3
  • Longlong Song
    • 4
    • 5
  • Yunpeng Lu
    • 5
  • Qun Ouyang
    • 5
  1. 1.School of High Energy Accelerator ScienceSOKENDAITsukubaJapan
  2. 2.Institute of Particle and Nuclear Studies, KEKTsukubaJapan
  3. 3.Institute of Materials Structure Science, KEKTsukubaJapan
  4. 4.University of Chinese Academy of SciencesBeijingChina
  5. 5.State Key Laboratory of Particle Detection and Electronics (IHEP, CAS)BeijingChina

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