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A Plan Patching Approach to Switchbox Routing

  • William P.-C. Ho
Conference paper

Abstract

We present a new AI approach to doing switchbox routing. Switchbox routing is the problem of connecting net terminals which are fixed on the boundaries of a rectangular routing area. It can be regarded as a planning problem in which the overall goal is to route the switchbox, and the individual subgoals are to route individual nets. The solution can then be called the completed “route-plan”. Switchbox routing is usually viewed as a constructive process based on a statically ordered set of heuristic rules, which is used to select the next net to route and to dictate how that net is to be routed. If the next net cannot be routed without conflict (overlapping nets in some track), the router quits in failure. Our approach starts at this point and is based on resolving such conflicts by patching the almost-correct route-plan. But this repair process can itself be regarded as a planning problem in which the overall goal is to resolve all of the conflicts, and the individual interacting subgoals are to correct individual conflicts. The solution can then be called the “patch-plan” which patches the route-plan. Because repair is formulated as a planning problem, the same planning architecture used to construct the route-plan can be used to construct the patch-plan. Therefore, we will use the architecture we have developed for our constructive PI-CAD ROUTER to build our reparative PI-CAD PATCHER. The result is a plan to patch another plan which is constructed in a situation-specific, interaction-sensitive manner.

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Bibliography

  1. [1]
    Ho, W. , D. Y. Y. Yun, and Y. H. Hu, “Planning strategies for switchbox routing”, International Conference on Computer Design, 1985, pp. 463–467Google Scholar
  2. [2]
    Ho, W. , D. Y. Y. Yun, and N. P. Keng, “PI-CAD ROUTER: the meta-level knowledge for situationspecific routing”, submitted to 23rd Design Automation Conference, 1986.Google Scholar
  3. [3]
    Ho, W., “Regarding placement as a consistent labeling problem with classification of constraints into abstraction levels”, submitted to 23rd Design Automation Conference, 1986.Google Scholar
  4. [4]
    La Paugh, A. S., “Algorithms for integrated circuit layout: an analytic approach”, Doctoral thesis, Department of Computer Science, Massachusetts Institute of Technology, 1980.Google Scholar
  5. [5]
    Rivest, R. L., and C. M. Fiduccia, “A greedy channel router”, Computer-aided Design, vol. 15, no. 3, May 1983, pp. 135–140.CrossRefGoogle Scholar
  6. [6]
    Hamachi, G. T., and J. K. Ousterhout, “A switchbox router with obstacle avoidance”, 21st Design Automation Conference, 1984, pp. 173–179.Google Scholar
  7. [7]
    Marek-Sadowska, M., “Two-dimensional router for double layer layout”, 22nd Design Automation Conference, 1985, pp. 117–123.Google Scholar
  8. [8]
    Stefik, M. ,“Planning and meta-planning, (MOLGEN: part 2)”, Ar tifici al Intelligence 16, 1981, pp. 141–169.CrossRefGoogle Scholar
  9. [9]
    Sacerdoti, E. D. , “The nonlinear nature of plans”, IJCAI 4, 1975, pp. 206–214.Google Scholar
  10. [10]
    Stefik, M., “Planning with constraints, (MOLGEN: part 1)”, Artificial Intelligence 16, 1981, pp. 111–139.CrossRefGoogle Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1986

Authors and Affiliations

  • William P.-C. Ho
    • 1
  1. 1.Department of Computer Science and EngineeringSouthern Methodist UniversityDallasUSA

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