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HW-Driven Emulation with Automatic Interface Generation

  • M. Çakir
  • E. Grimpe
  • W. Nebel
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2778)

Abstract

This paper presents an approach to automate the emulation of HW/SW-Systems on an FPGA-board attached to a host. The basic steps in design preparation for the emulation are the generation of the interconnection and the description of the synchronization mechanism between the HW and the SW. While some of the related work considers the generation of the interconnection with some manual interventions, the generation of the synchronization mechanism is left to the user as part of the effort to set up the emulation. We present an approach to generate the interconnection and the synchronization mechanism, which allows a HW-driven communication between the SW and the HW.

Keywords

Data Transmission Automatic Generation Synchronization Mechanism Interface Generation Master Clock 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2003

Authors and Affiliations

  • M. Çakir
    • 1
  • E. Grimpe
    • 2
  • W. Nebel
    • 1
  1. 1.Department of Computer ScienceCarl von Ossietzky University OldenburgOldenburgGermany
  2. 2.OFFIS Research InstituteOldenburgGermany

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