Emulation-Based Analysis of Soft Errors in Deep Sub-micron Circuits

  • M. Sonza Reorda
  • M. Violante
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2778)


The continuous technology scaling makes soft errors a critical issue in deep sub-micron technologies, and techniques for assessing their impact are strongly required that combine efficiency and accuracy. FPGA-based emulation is a promising solution to tackle this problem when large circuits are considered, provided that suitable techniques are available to support time-accurate simulations via emulation. This paper presents a novel technique that embeds time-related information in the topology of the analyzed circuit, allowing evaluating the effects of the soft errors known as single event transients (SETs) in large circuits via FPGA-based emulation. The analysis of complex designs becomes thus possible at a very limited cost in terms of CPU time, as showed by the case study described in the paper.


Fault Injection Soft Error Circuit Input Fault List Single Event Transient 
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Copyright information

© Springer-Verlag Berlin Heidelberg 2003

Authors and Affiliations

  • M. Sonza Reorda
    • 1
  • M. Violante
    • 1
  1. 1.Dip. Automatica e InformaticaPolitecnico di TorinoTorinoItaly

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