A Real-Time Stereo Vision System with FPGA

  • Yosuke Miyajima
  • Tsutomu Maruyama
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2778)


In this paper, we describe a compact stereo vision system which consists of one off-the-shelf FPGA board with one FPGA. This system supports (1) camera calibration for easy use and for simplifying the circuit, and (2) left-right consistency check for reconstructing correct 3-D geometry from the images taken by the cameras. The performance of the system is limited by the calibration (which is, however, a must for practical use) because only one pixel data can be allowed to read in owing to the calibration. The performance is, however, 20 frame per second (when the size of images is 640 x 480, and 80 frames per second when the size of images is 320 x 240), which is fast enough for practical use such as vision systems for autonomous robots. This high performance can be realized by the recent progress of FPGAs and wide memory access to external RAMs (eight memory banks) on the FPGA board.


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Copyright information

© Springer-Verlag Berlin Heidelberg 2003

Authors and Affiliations

  • Yosuke Miyajima
    • 1
  • Tsutomu Maruyama
    • 1
  1. 1.Institute of Engineering Mechanics and SystemsUniversity of TsukubaTsukuba IbarakiJapan

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