Advertisement

Implementing an OFDM Receiver on the RaPiD Reconfigurable Architecture

  • Carl Ebeling
  • Chris Fisher
  • Guanbin Xing
  • Manyuan Shen
  • Hui Liu
Conference paper
Part of the Lecture Notes in Computer Science book series (volume 2778)

Abstract

Reconfigurable architectures have been touted as an alternative to ASICs and DSPs for applications that require a combination of high performance and flexibility. However, the use of fine-grained FPGA architectures in embedded platforms is hampered by their very large overhead. This overhead can be reduced substantially by taking advantage of an application domain to specialize the reconfigurable architecture using coarse-grained components and interconnects. This paper describes the design and implementation of an OFDM Receiver using the RaPiD architecture and RaPiD-C programming language. We show a factor of about 6x increase in cost-performance over a DSP implementation and 15x over an FPGA implementation.

Keywords

FPGA Implementation Delay Unit Reconfigurable Architecture Configurable Architecture OFDM Frame 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
    Ebeling, C., Cronquist, D.C., Franklin, P., Secosky, J., Berg, S.G.: Mapping applications to the RaPiD configurable architecture. In: Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines, pp. 106–115 (1997)Google Scholar
  2. 2.
    Ebeling, C., Cronquist, D.C., Franklin, P., Secosky, J., Berg, S.G.: Mapping Applications to the RaPiD Configurable Architecture. In: Field-Programmable Custom Computing Machines (1997)Google Scholar
  3. 3.
    Fisher, C., Rennie, K., Xing, G., Berg, S., Bolding, K., Naegle, J., Parshall, D., Portnov, D., Sulejmanpasic, A., Ebeling, C.: An Emulator for Exploring RaPiD Configurable Computing Architectures. In: Brebner, G., Woods, R. (eds.) FPL 2001. LNCS, vol. 2147, pp. 17–26. Springer, Heidelberg (2001)CrossRefGoogle Scholar
  4. 4.
    Cronquist, D., Fisher, C., Figueroa, M., Franklin, P., Ebeling, C.: Architecture design of reconfigurable pipelined datapaths. In: Proceedings of the Conference on Advanced Research in VLSI, pp. 23–40 (1999)Google Scholar
  5. 5.
    Cronquist, D., Franklin, P., Berg, S.G., Ebeling, C.: Specifying and Compiling Applications for RaPiD. In: IEEE Symposium on FPGAs for Custom Computing Machines pp. 116-125 (1998)Google Scholar
  6. 6.
    Van Nee, R., Prasad, R.: OFDM for Wireless Multimedia Communications. Artech (1999)Google Scholar
  7. 7.
    Xing, G., Liu, H., Shi, R.: A multichannel MC-CDMA demodulator and its implementation. In: Proc. Asilomar 1999 (1999)Google Scholar
  8. 8.
    Cronquist, D.: Reconfigurable Pipelined Datapaths., Ph.D. Thesis, Department of Computer Science and Engineering, University of Washington, Seattle, WA (1999)Google Scholar
  9. 9.
    Gold, B., Bially, T.: Parallelism in Fast Fourier Transform Hardware. IEEE Trans. on Audio and Electroacoustics 21, 5–16 (1985)CrossRefGoogle Scholar
  10. 10.
    Texas Instruments Web Page, focus.ti.com/docs/military/catalog/general/general. jhtml?templateId=5603&path=templatedata/cm/milgeneral/data/dsp_die_rev Google Scholar
  11. 11.

Copyright information

© Springer-Verlag Berlin Heidelberg 2003

Authors and Affiliations

  • Carl Ebeling
    • 1
  • Chris Fisher
    • 1
  • Guanbin Xing
    • 2
  • Manyuan Shen
    • 2
  • Hui Liu
    • 2
  1. 1.Department of Computer Science and EngineeringUniversity of WashingtonUSA
  2. 2.Department of Electrical EngineeringUniversity of WashingtonUSA

Personalised recommendations