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Designing, Scheduling, and Allocating Flexible Arithmetic Components

  • Vinu Vijay Kumar
  • John Lach
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2778)

Abstract

This paper introduces new scheduling and allocation algorithms for designing with hybrid arithmetic component libraries composed of both operation-specific components and flexible components capable of executing multiple operations. The flexible components are implemented primarily in fixedlogic with only small amounts of application-specific reconfigurability, which provides the flexibility needed without the negative area and performance penalties commonly associated with general-purpose reconfigurable arrays. Results obtained with hybrid library scheduling and allocation on a variety of digital signal processing (DSP) filters reveal that significant area savings are achieved.

Keywords

Digital Signal Processing Allocation Algorithm List Schedule Data Flow Graph Area Saving 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2003

Authors and Affiliations

  • Vinu Vijay Kumar
    • 1
  • John Lach
    • 1
  1. 1.Department of Electrical and Computer EngineeringUniversity of VirginiaCharlottesvilleUSA

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