MEMS Microphones: Concept and Design for Mobile Applications
Despite MEMS microphone market getting more mature, the demand is still increasing due to the integration of several units in the same mobile device. Moreover, product specifications are pushing toward contradicting directions—increase of Signal-to-Noise Ratio (SNR) and Acoustic Overload Point (AOP)—with a continuous miniaturization of the package and power savings. To achieve those targets, the development of both the sensor and the readout circuitry must proceed in close interaction to allow trade-offs and define irremovable constraints. The use of behavioral models for the sensor as well as the package allows tailoring the design of the readout electronics to the specific requirements of the acoustical system, leading to the optimum performance in terms of noise and power consumption. After introducing the most commonly used techniques to map the electroacoustical properties of transducer and package, a design example of a state-of-the-art digital microphone system with 140 dB SPL full scale and achieving an SNR of 67 dB at the reference level of 94 dB SPL is presented.
- 1.Malcovati P, et al. Interface circuits for MEMS microphones, Springer, Nyquist AD converters, sensor interfaces, and robustness. 2011. p. 149–74.Google Scholar
- 2.Füldner M, et al. Dual Back Plate Silicon MEMS Microphone: Balancing High Performance!. DAGA 2015: 41. Jahrestagung für Akustik, March 2015, Nürnberg.Google Scholar
- 3.Martin D. Design, fabrication, and characterization of a MEMS dual-backplate capacitive microphone, PhD thesis, University of Florida, 2007.Google Scholar
- 4.Bach E, et al. A 1.8V true-differential 140dB SPL full-scale standard CMOS MEMS digital microphone exhibiting 67dB SNR. In: 2017 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, 2017, p. 166–7.Google Scholar
- 5.De Berti C, et al. A 106.7-dB DR, 390-μW CT 3rd-order ΣΔ modulator for MEMS microphones. In: Proceedings of ESSCIRC. 2015. p. 209–12.Google Scholar
- 6.Dörrer L, et al. A 3-mW 74-dB SNR 2-MHz continuous-time delta-sigma ADC with a tracking ADC quantizer in 0.13-μm CMOS. IEEE JSSC. 2005;40:2416–27.Google Scholar