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A Deep Sub-micron Class D Amplifier

  • Mark McCloy-StevensEmail author
  • Toru Ido
  • Hamed Sadati
  • Yu Tamura
  • Paul Lesso
Chapter

Abstract

This chapter presents a digital Class D amplifier targeted at deep sub-micron process nodes, where digital processing is cheap and analog is expensive in terms of area and power. The architecture uses open-loop and closed-loop configurations and combines the concepts of both to provide high performance over the full signal range. At low-signal levels, low noise and power is achieved with open-loop digital operation. At larger signal levels, a closed-loop digital Class D mode is used to deliver low THD and high PSRR with minimal analog circuitry.

References

  1. 1.
    Lesso JP, Ido T. Class D amplifier circuit. U.S. Patent 9,628,040 B2, Apr. 18, 2017.Google Scholar
  2. 2.
    Mouton T, Putzeys B. Digital control of a PWM switching amplifier with global feedback. In: Proceedings of the AES 37th international conference. New York; 2009. p. 108–17.Google Scholar
  3. 3.
    Lesso JP, Pennock JL. Analogue-to-digital converter. U.S. Patent 8,742,970 B2, Jun. 3, 2014.Google Scholar

Copyright information

© Springer Nature Switzerland AG 2019

Authors and Affiliations

  • Mark McCloy-Stevens
    • 1
    Email author
  • Toru Ido
    • 1
  • Hamed Sadati
    • 1
  • Yu Tamura
    • 1
  • Paul Lesso
    • 1
  1. 1.Cirrus Logic International (UK) LtdEdinburghUK

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