Design and Optimization of Double-Gate MOSFET to Reduce the Effects of Single Event Transients
In this paper, the effects of Single Event Transients (SETs) due to heavy-ion strike in Double-Gate (DG) MOSFET is studied through simulations. Based on the understanding through simulation studies, an optimized device design is proposed to reduce these effects. The charge deposition by the heavy-ion striking at the center of the channel and the transport of the released charge carriers towards the drain are simulated. The DG-MOSFET is optimized through channel doping, varying silicon thickness and back gate bias to reduce the effects of SETs.
The authors would like to thank Department of Science and Technology (DST), Govt. of India for its financial assistance (Grant Number SERB/F/4573/2016-17) in carrying out these research activities.
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