Inferring Energy Bounds via Static Program Analysis and Evolutionary Modeling of Basic Blocks

  • Umer Liqat
  • Zorana Banković
  • Pedro Lopez-GarciaEmail author
  • Manuel V. Hermenegildo
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 10855)


The ever increasing number and complexity of energy-bound devices (such as the ones used in Internet of Things applications, smart phones, and mission critical systems) pose an important challenge on techniques to optimize their energy consumption and to verify that they will perform their function within the available energy budget. In this work we address this challenge from the software point of view and propose a novel approach to estimating accurate parametric bounds on the energy consumed by program executions that are practical for their application to energy verification and optimization. Our approach divides a program into basic (branchless) blocks and performs a best effort modeling to estimate upper and lower bounds on the energy consumption for each block using an evolutionary algorithm. Then it combines the obtained values according to the program control flow, using a safe static analysis, to infer functions that give both upper and lower bounds on the energy consumption of the whole program and its procedures as functions on input data sizes. We have tested our approach on (C-like) embedded programs running on the XMOS hardware platform. However, our method is general enough to be applied to other microprocessor architectures and programming languages. The bounds obtained by our prototype implementation on a set of benchmarks were always safe and quite accurate. This supports our hypothesis that our approach offers a good compromise between safety and accuracy, and can be applied in practice for energy verification and optimization.


Energy modeling Evolutionary algorithms Static analysis Energy consumption analysis and verification Resource analysis and verification 



This research has received funding from the European Union 7th Framework Program agreement no 318337, ENTRA, Spanish MINECO TIN2015-67522-C3-1-R TRACES project, and the Madrid M141047003 N-GREENS program. We also thank Henk Muller, Principal Technologist, XMOS, for his help with the measurement boards, evaluation platform, benchmarks, and overall support.


  1. 1.
    Albert, E., Arenas, P., Genaim, S., Puebla, G., Zanardini, D.: Cost analysis of Java bytecode. In: De Nicola, R. (ed.) ESOP 2007. LNCS, vol. 4421, pp. 157–172. Springer, Heidelberg (2007). Scholar
  2. 2.
    Chakravarty, S., Zhao, Z., Gerstlauer, A.: Automated, retargetable back-annotation for host compiled performance and power modeling. In: Proceedings of CODES+ISSS 2013, pp. 36:1–36:10. IEEE Press, USA (2013).
  3. 3.
    Debray, S.K., Lin, N.W., Hermenegildo, M.V.: Task granularity analysis in logic programs. In: Proceedings of PLDI 1990, pp. 174–188. ACM, June 1990CrossRefGoogle Scholar
  4. 4.
    Debray, S.K., López-García, P., Hermenegildo, M.V., Lin, N.W.: Lower bound cost estimation for logic programs. In: ILPS 1997, pp. 291–305. MIT Press (1997)Google Scholar
  5. 5.
    Henriksen, K.S., Gallagher, J.P.: Abstract interpretation of PIC programs through logic programming. In: Proceedings of SCAM 2006, pp. 184–196. IEEE Computer Society (2006)Google Scholar
  6. 6.
    Hermenegildo, M., Puebla, G., Bueno, F., García, P.L.: Integrated program debugging, verification, and optimization using abstract interpretation (and The Ciao System Preprocessor). Sci. Comput. Program. 58(1–2), 115–140 (2005)MathSciNetCrossRefGoogle Scholar
  7. 7.
    Hermenegildo, M.V., Bueno, F., Carro, M., López, P., Mera, E., Morales, J., Puebla, G.: An overview of Ciao and its design philosophy. TPLP 12(1–2), 219–252 (2012). Scholar
  8. 8.
    Jayaseelan, R., Mitra, T., Li, X.: Estimating the worst-case energy consumption of embedded software. In: Proceedings of IEEE RTAS, pp. 81–90. IEEE Computer Society (2006).
  9. 9.
    Kerrison, S., Eder, K.: Energy modeling of software for a hardware multithreaded embedded microprocessor. ACM TECS 14(3), 1–25 (2015). Scholar
  10. 10.
    Lafond, S., Lilius, J.: Energy consumption analysis for two embedded Java virtual machines. J. Syst. Archit. 53(5–6), 328–337 (2007)CrossRefGoogle Scholar
  11. 11.
    Liqat, U., Georgiou, K., Kerrison, S., Lopez-Garcia, P., Hermenegildo, M.V., Gallagher, J.P., Eder, K.: Inferring parametric energy consumption functions at different software levels: ISA vs. LLVM IR. In: van Eekelen, M., Dal Lago, U. (eds.) Proceedings of FOPARA. LNCS, vol. 9964, pp. 81–100. Springer, Heidelberg (2016)CrossRefGoogle Scholar
  12. 12.
    Liqat, U., Kerrison, S., Serrano, A., Georgiou, K., Lopez-Garcia, P., Grech, N., Hermenegildo, M.V., Eder, K.: Energy consumption analysis of programs based on XMOS ISA-level models. In: Gupta, G., Peña, R. (eds.) LOPSTR 2013. LNCS, vol. 8901, pp. 72–90. Springer, Cham (2014). Scholar
  13. 13.
    López-García, P., Darmawan, L., Bueno, F.: A framework for verification and debugging of resource usage properties. In: Technical Communications of ICLP. LIPIcs, vol. 7, pp. 104–113. Schloss Dagstuhl (July 2010)Google Scholar
  14. 14.
    Lopez-Garcia, P., Darmawan, L., Bueno, F., Hermenegildo, M.: Interval-based resource usage verification: formalization and prototype. In: Peña, R., van Eekelen, M., Shkaravska, O. (eds.) FOPARA 2011. LNCS, vol. 7177, pp. 54–71. Springer, Heidelberg (2012). Scholar
  15. 15.
    Lopez-Garcia, P., Haemmerlé, R., Klemen, M., Liqat, U., Hermenegildo, M.V.: Towards energy consumption verification via static analysis. In: WS on High Performance Energy Efficient Embedded Systems (HIP3ES) (2015)Google Scholar
  16. 16.
    Lv, M., Guan, N., Reineke, J., Wilhelm, R., Yi, W.: A survey on static cache analysis for real-time systems. LITES 3(1), 5:1–5:48 (2016)Google Scholar
  17. 17.
    May, D.: The XMOS XS1 architecture (2013).
  18. 18.
    Méndez-Lojo, M., Navas, J., Hermenegildo, M.V.: A flexible, (C)LP-based approach to the analysis of object-oriented programs. In: King, A. (ed.) LOPSTR 2007. LNCS, vol. 4915, pp. 154–168. Springer, Heidelberg (2008). Scholar
  19. 19.
    Mera, E., López-García, P., Carro, M., Hermenegildo, M.V.: Towards execution time estimation in abstract machine-based languages. In: PPDP 2008, pp. 174–184. ACM Press, July 2008Google Scholar
  20. 20.
    Navas, J., Méndez-Lojo, M., Hermenegildo, M.: Safe upper-bounds inference of energy consumption for Java bytecode applications. In: NASA LFM 2008, pp. 29–32, April 2008Google Scholar
  21. 21.
    Navas, J., Mera, E., López-García, P., Hermenegildo, M.V.: User-definable resource bounds analysis for logic programs. In: Dahl, V., Niemelä, I. (eds.) ICLP 2007. LNCS, vol. 4670, pp. 348–363. Springer, Heidelberg (2007). Scholar
  22. 22.
    Pallister, J., Kerrison, S., Morse, J., Eder, K.: Data dependent energy modeling for worst case energy consumption analysis. Technical report, May 2015.
  23. 23.
    Serrano, A., Lopez-Garcia, P., Hermenegildo, M.V.: Resource usage analysis of logic programs via abstract interpretation using sized types. TPLP 14(4–5), 739–754 (2014). ICLP 2014 Special IssueCrossRefGoogle Scholar
  24. 24.
    Wagemann, P., Distler, T., Honig, T., Janker, H., Kapitza, R., Schroder-Preikschat, W.: Worst-case energy consumption analysis for energy-constrained embedded systems. In: 2015 27th Euromicro Conference on Real-Time Systems (ECRTS), pp. 105–114, July 2015Google Scholar
  25. 25.
    Watt, D.: Programming XC on XMOS devices. XMOS Limited (2009).
  26. 26.
    Wilhelm, R., Engblom, J., Ermedahl, A., Holsti, N., Thesing, S., Whalley, D., Bernat, G., Ferdinand, C., Heckmann, R., Mitra, T., Mueller, F., Puaut, I., Puschner, P., Staschulat, J., Stenström, P.: The worst-case execution-time problem - overview of methods and survey of tools. ACM Trans. Embedded Comput. Syst. 7(3), 1–53 (2008)CrossRefGoogle Scholar

Copyright information

© Springer International Publishing AG, part of Springer Nature 2018

Authors and Affiliations

  1. 1.IMDEA Software InstituteMadridSpain
  2. 2.Spanish Council for Scientific Research (CSIC)MadridSpain
  3. 3.Universidad Politécnica de MadridMadridSpain

Personalised recommendations