Advertisement

Continuous Time Sigma-Delta Modulators

  • Isacco Arnaldi
Chapter

Abstract

This chapter is dedicated to introducing the continuous time (CT) implementation of Sigma-Delta modulators. Therefore, the significant differences between discrete time and continuous time modulators will be analyzed, as well as the differences concerning the actual design process. On this regard, the mathematical equivalence between CT and DT modulators is presented and used to demonstrate the inherent anti-aliasing characteristic of CT designs. Moreover, important non-idealities which are specific to CT modulators, as well as some practical issues derived from actual circuits, will be discussed and suggestions for simulation practices of CT modulators in MATLAB/Simulink® provided. By the end of this chapter, the reader should have a basic knowledge of all the fundamentals relative to continuous time Sigma-Delta converters and be able to develop basic, high-level CT modulator systems in the Simulink® environment.

References

  1. 1.
    De la Rosa JM, Del Rio RF. CMOS sigma-delta converters: practical design guide. London: Wiley; 2013.CrossRefGoogle Scholar
  2. 2.
    Casier H, Steyaert M, Van Roermund AHM. Analog circuit design: robust design, sigma delta converters, RFID. London: Springer; 2011.CrossRefGoogle Scholar
  3. 3.
    Kester W. ADC architectures IV: sigma-delta ADC advanced concepts and applications. analog devices, 2008. [Online] http://www.analog.com/media/en/training-seminars/tutorials/MT-023.pdf.
  4. 4.
    Schreier R, Temes GC. Understanding delta-sigma data converters. Hoboken: Wiley; 2005.Google Scholar
  5. 5.
    Bourdopoulos G, et al. Delta-sigma modulators: modelling, design and applications. London: Imperial College Press; 2003.CrossRefGoogle Scholar
  6. 6.
    Ortmanns M, Gerfers F. Continuous-time sigma-delta A/D conversion: fundamentals, performance limits and robust implementations. Berlin/Heidelberg: Springer; 2006.Google Scholar
  7. 7.
    Reiss JD. Understanding sigma-delta modulation: the solved and unsolved issues. JAES. 2008;56(1/2):49–64.Google Scholar
  8. 8.
    Cherry JA, Snelgrove WM. Continuous-time delta-sigma modulators for high- speed a/D conversion: theory, practice and fundamental performance limits. London: Kluwer Academic Publishers; 2002.Google Scholar
  9. 9.
    Breems L, Huijsing J. Continuous-time delta-sigma modulation for a/D conversion in radio receivers. London: Kluwer Academic Publishers; 2001.Google Scholar
  10. 10.
    Candy JC, Temes GC. Oversampling delta-sigma data converters: theory, design and simulation. New York: Wiley-IEEE Press; 1991.CrossRefGoogle Scholar
  11. 11.
    Norsworthy SR, Schreier R, Temes GC. Delta-sigma data converters: theory, design and simulation. New York: Wiley-IEEE Press; 1996.CrossRefGoogle Scholar
  12. 12.
    Medeiro F, Verdù BP, Vazquez AR. Top down design of high performance sigma delta modulators. Boston: Kluwer Academic Publisher; 1999.CrossRefGoogle Scholar
  13. 13.
    Ortmanns M, Gerfers F, Manoli Y. Compensation of finite gain-bandwidth induced errors in continuous-time sigma-delta modulators. IEEE Trans, Circuits Syst I: Regul Pap. 2004;51:1088.CrossRefGoogle Scholar
  14. 14.
    Keller M, et al. A comparative study on excess-loop delay compensation techniques for continuous time sigma delta modulators. IEEE, Circuits Syst I: Regul Pap. 1998;55:1887.Google Scholar
  15. 15.
    Kester W. The data conversion handbook. Burlington: Analog Devices Inc.; 2004.Google Scholar
  16. 16.
    Reddy K, Pavan S. Fundamental limitations of continuous time delta sigma modulators due to clock jitter. IEEE Trans Circuits Syst – I: Regul Pap. 2007;54(10):2184–94.CrossRefGoogle Scholar
  17. 17.
    Hernandez L et al. Modelling and optimization of low pass continuous-time sigma- delta modulators for clock jitter noise reduction. In: Proceedings of the 2004 international symposium on circuits and systems, ISCAS, 2004.Google Scholar
  18. 18.
    Silva P. et al. Noise analysis of continuous time delta sigma modulators with switched capacitor feedback DAC. In: IEEE, circuits and systems, ISCAS international symposiums; 2006. p. 4.Google Scholar
  19. 19.
    Anderson M, Sundstorm L. Design and measurement of a CT delta-sigma ADC with switched capacitor switched resistor feedback. IEEE, Solid State Circuit J. 2009;44(2):473–83.CrossRefGoogle Scholar
  20. 20.
    Ortmanns M, Gerfers F, Manoli Y. Jitter insensitive feedback DAC for continuous time sigma delta modulators. In: IEEE international conference, electronics circuits and system, 2001. p. 1049.Google Scholar
  21. 21.
    Sukumaran A, Pavan S. Low power design techniques for single-bit audio continuous time delta sigma ADCs using FIR feedback. IEEE J Solid-State Circuits. 2014;49(11):2515–25.CrossRefGoogle Scholar
  22. 22.
    Oliaei O. Sigma–delta modulator with spectrally shaped feedback. IEEE Trans Circuits Syst II, Analog Digit Signal Process. 2003;50(9):518–30.MathSciNetCrossRefGoogle Scholar
  23. 23.
    Nguyen K. A 106-dB SNR hybrid oversampling analog-to-digital converter for digital audio. IEEE J Solid State Circuits. 2005;40(12):2408–15.CrossRefGoogle Scholar
  24. 24.
    Yavari M, Shoaei O. A 3.3V high resolution sigma delta modulator for digital audio. In: IEEE, 13th international conference on microelectronics, Rabat, Morocco, Oct 29–31, 2001.Google Scholar

Copyright information

© Springer International Publishing AG, part of Springer Nature 2019

Authors and Affiliations

  • Isacco Arnaldi
    • 1
  1. 1.CaldognoItaly

Personalised recommendations