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G4LTL-ST: Automatic Generation of PLC Programs

  • Chih-Hong Cheng
  • Chung-Hao Huang
  • Harald Ruess
  • Stefan Stattelmann
Part of the Lecture Notes in Computer Science book series (LNCS, volume 8559)

Abstract

G4LTL-ST automatically synthesizes control code for industrial Programmable Logic Controls (PLC) from timed behavioral specifications of input-output signals. These specifications are expressed in a linear temporal logic (LTL) extended with non-linear arithmetic constraints and timing constraints on signals. G4LTL-ST generates code in IEC 61131-3-compatible Structured Text, which is compiled into executable code for a large number of industrial field-level devices. The synthesis algorithm of G4LTL-ST implements pseudo-Boolean abstraction of data constraints and the compilation of timing constraints into LTL, together with a counterstrategy-guided abstraction-refinement synthesis loop. Since temporal logic specifications are notoriously difficult to use in practice, G4LTL-ST supports engineers in specifying realizable control problems by suggesting suitable restrictions on the behavior of the control environment from failed synthesis attempts.

Keywords

industrial automation synthesis theory combination assumption generation 

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Copyright information

© Springer International Publishing Switzerland 2014

Authors and Affiliations

  • Chih-Hong Cheng
    • 1
  • Chung-Hao Huang
    • 2
  • Harald Ruess
    • 3
  • Stefan Stattelmann
    • 1
  1. 1.ABB Corporate ResearchLadenburgGermany
  2. 2.Department of Electrical EngineeringNational Taiwan UniversityTaipeiTaiwan
  3. 3.fortiss - An-Institut Technische Universität MünchenMünchenGermany

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