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Hardware Accelerators for Fast Implementation of DMC and GPC Control Algorithms Using FPGA and Their Applications to a Servomotor

Conference paper
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Part of the Advances in Intelligent Systems and Computing book series (AISC, volume 1196)

Abstract

This work presents hardware accelerators implemented in the Field Programmable Gate Array (FPGA) which perform fast calculations for Model Predictive Control (MPC) algorithms. Two MPC algorithms are considered: Dynamic Matrix Control (DMC) and Generalized Predictive Control (GPC). The hardware accelerator-based DMC and GPC algorithms are applied to a servomotor.

Keywords

Field programmable gate array Model predictive control Servomotor 

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Copyright information

© Springer Nature Switzerland AG 2020

Authors and Affiliations

  1. 1.Institute of Control and Computation EngineeringWarsaw University of TechnologyWarsawPoland

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