Design and Implementation of Assembler for High Performance Digital Signal Processor (DSP)
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With the rapid development of the fifth-generation mobile communication technology (5G), existing digital signal processors (DSP) on the market cannot efficiently provide the performance required by some applications. In this situation, we design a new DSP with faster speed, lower latency and higher performance. In this article, based on the new DSP which can adapt to the new technology of 5G, we designed an assembler called Swift Assembler (SA). Different from the traditional assembler, SA is based on the Gnu Architecture Description Language, (GADL). We perform semantic analysis on GADL description files and then with the help of flex, bison and Binutils, the assembler is compiled and generated. With the support of GADL, SA has a clearer architecture and better scalability. At the same time, it covered the underlying implementation. Benefit from this, programmers can modify its source code with no need to understand the underlying implementation process. In this way, the design of interdependent hardware and software can be more easily.
Keywords5G DSP GADL SA
The authors thank the editors and the anonymous reviewers for their invaluable comments to help to improve the quality of this paper. This work was supported in part by the National Natural Science Foundation of China under Grant Nos. 61831018, 61571329 and 61631017, and Guangdong Province Key Research and Development Program Major Science and Technology Projects under Grant 2018B010115002.
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