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A Variation-Tolerant DIMA via On-Chip Training

  • Mingu Kang
  • Sujan Gonugondla
  • Naresh R. Shanbhag
Chapter
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Abstract

Though DIMA significantly reduces the decision EDP of machine learning kernels, it is not clear what the limits of this reduction are. In fact, DIMA’s analog nature makes it sensitive to process, voltage, and temperature (PVT) variations especially when the BL swing is reduced in order to enhance DIMA’s energy efficiency. This chapter describes the use of an on-chip trainer to reduce the BL swing without compromising DIMA’s inference accuracy. A robust deep in-memory SVM classifier prototype in a 65 nm CMOS that uses a standard 16 kB 6T SRAM is presented. This IC employs an on-chip stochastic gradient descent (SGD)-based trainer that adapts not only to chip-specific variations in PVT but also to data statistics in order to further enhance DIMA’s energy efficiency.

Keywords

On-chip learning Stochastic gradient descent (SGD) Error resiliency Error compensation Process variations Spatial variations 

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Copyright information

© Springer Nature Switzerland AG 2020

Authors and Affiliations

  • Mingu Kang
    • 1
  • Sujan Gonugondla
    • 2
  • Naresh R. Shanbhag
    • 2
  1. 1.IBM T. J. Watson Research CenterOld TappanUSA
  2. 2.University of Illinois at Urbana-ChampaignUrbanaUSA

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