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EASE: Enabling Hardware Assertion Synthesis from English

  • Rahul KrishnamurthyEmail author
  • Michael S. Hsiao
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 11784)

Abstract

In this paper, we present EASE (Enabling hardware Assertion Synthesis from English) which translates hardware design specifications written in English to a formal assertion language. Existing natural language processing (NLP) tools for hardware verification utilize the vocabulary and grammar of a few specification documents only. Hence, they lack the ability to provide linguistic variations in parsing and writing natural language assertions. The grammar used in EASE does not follow a strict English syntax for writing design specifications. Our grammar incorporates dependency rules for syntactic categories which are coupled with semantic category dependencies that allow users to specify the same design specification using different word sequences in a sentence. Our NLP engine consists of interleaving operations of semantic and syntactic analyses to understand the input sentences and map differently worded sentences with the same meaning to the same logical form. Moreover, our approach also provides semantically driven suggestions for sentences that are not understood by the system. EASE has been tested on natural language requirements extracted from memory controller, UART and AMBA AXI protocol specification documents. The system has been tested for imperative, declarative and conditional types of specifications. The results show that the proposed approach can handle a more diverse set of linguistic variations than existing methods.

Keywords

Natural Language Processing Hardware verification Natural language programming 

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Copyright information

© Springer Nature Switzerland AG 2019

Authors and Affiliations

  1. 1.Department of Electrical and Computer EngineeringVirginia Tech BlacksburgBlacksburgUSA

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